MC9S12E256 Datasheet, PDF (422/602 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 13 Timer Module (TIM16B4CV1)
13.3.2.7 Timer Toggle On Overflow Register 1 (TTOV)
7
6
5
4
3
2
1
0
R
0
0
0
0
TOV7
TOV6
TOV5
TOV4
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 13-13. Timer Toggle On Overflow Register 1 (TTOV)
Read: Anytime
Write: Anytime
Table 13-7. TTOV Field Descriptions
Field
7:4
TOV[7:4]
Description
Toggle On Overflow Bits — TOVx toggles output compare pin on overflow. This feature only takes effect when
in output compare mode. When set, it takes precedence over forced output compare but not channel 7 override
events.
0 Toggle output compare pin on overflow feature disabled.
1 Toggle output compare pin on overflow feature enabled.
13.3.2.8 Timer Control Register 1 (TCTL1)
7
6
5
4
3
2
1
0
R
OM7
OL7
OM6
OL6
OM5
OL5
OM4
OL4
W
Reset
0
0
0
0
0
0
0
0
Figure 13-14. Timer Control Register 1 (TCTL1)
Read: Anytime
Write: Anytime
Table 13-8. TCTL1/TCTL2 Field Descriptions
Field
7:4
OMx
7:4
OLx
Description
Output Mode — These four pairs of control bits are encoded to specify the output action to be taken as a result
of a successful OCx compare. When either OMx or OLx is 1, the pin associated with OCx becomes an output
tied to OCx.
Note: To enable output action by OMx bits on timer port, the corresponding bit in OC7M should be cleared.
Output Level — These four pairs of control bits are encoded to specify the output action to be taken as a result
of a successful OCx compare. When either OMx or OLx is 1, the pin associated with OCx becomes an output
tied to OCx.
Note: To enable output action by OLx bits on timer port, the corresponding bit in OC7M should be cleared.
MC9S12E256 Data Sheet, Rev. 1.08
422
Freescale Semiconductor