MC9S12E256 Datasheet, PDF (149/602 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

3.3.5.4
Port S Reduced Drive Register (RDRS)
Chapter 3 Port Integration Module (PIM9E256V1)
R
W
Reset
7
RDRS7
0
6
RDRS6
5
RDRS5
4
RDRS4
3
RDRS3
2
RDRS2
0
0
0
0
0
Figure 3-32. Port S Reduced Drive Register (RDRS)
1
RDRS1
0
0
RDRS0
0
Read: Anytime. Write: Anytime.
This register configures the drive strength of configured output pins as either full or reduced. If a pin is
configured as input, the corresponding Reduced Drive Register bit has no effect.
Table 3-23. RDRS Field Descriptions
Field
Description
7:0
Reduced Drive Port S
RDRS[7:0] 0 Full drive strength at output.
1 Associated pin drives at about 1/3 of the full drive strength.
3.3.5.5 Port S Pull Device Enable Register (PERS)
R
W
Reset
7
PERS7
1
6
PERS6
5
PERS5
4
PERS4
3
PERS3
2
PERS2
1
PERS1
1
1
1
1
1
1
Figure 3-33. Port S Pull Device Enable Register (PERS)
0
PERS0
1
Read: Anytime. Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated on configured input or
wired-OR (open drain) output pins. If a pin is configured as push-pull output, the corresponding Pull
Device Enable Register bit has no effect.
Table 3-24. PERS Field Descriptions
Field
7:0
Pull Device Enable Port S
PERS[7:0] 0 Pull-up or pull-down device is disabled.
1 Pull-up or pull-down device is enabled.
Description
MC9S12E256 Data Sheet, Rev. 1.08
Freescale Semiconductor
149