MC9S12E256 Datasheet, PDF (140/602 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 3 Port Integration Module (PIM9E256V1)
3.3.2.7 Port M Wired-OR Mode Register (WOMM)
7
6
5
4
3
2
1
0
R
0
0
0
0
WOMM7 WOMM6 WOMM5 WOMM4
W
Reset
0
0
0
0
0
0
0
0
= Reserved or Unimplemented
Figure 3-16. Port M Wired-OR Mode Register (WOMM)
Read: Anytime. Write: Anytime.
This register selects whether a port M output is configured as push-pull or wired-OR. When a Wired-OR
Mode Register bit is set to 1, the corresponding output pin is driven active low only (open drain) and a high
level is not driven. A Wired-OR Mode Register bit has no effect if the corresponding pin is configured as
an input.
These bits apply also to the SCI2 outputs and allow a multipoint connection of several serial modules.
If the IIC is enabled, the associated pins are always set to wired-OR mode, and the state of the
WOMM[7:6] bits have no effect. The WOMM[7:6] bits will not change to reflect their wired-OR mode
configuration when the IIC is enabled.
Table 3-13. WOMM Field Descriptions
Field
Description
7:4
Wired-OR Mode Port M
WOMM[7:4] 0 Output buffers operate as push-pull outputs.
1 Output buffers operate as open-drain outputs.
MC9S12E256 Data Sheet, Rev. 1.08
140
Freescale Semiconductor