MC9S12E256 Datasheet, PDF (100/602 Pages) Freescale Semiconductor, Inc – HCS12 Microcontrollers

Chapter 2 256 Kbyte Flash Module (FTS256K2V1)
2.3.2.11 Flash Data Registers (FDATA)
The banked FDATAHI and FDATALO registers are the Flash data registers.
7
6
5
4
3
2
1
0
R
FDATAHI
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-16. Flash Data High Register (FDATAHI)
7
6
5
4
3
2
1
0
R
FDATALO
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-17. Flash Data Low Register (FDATALO)
All FDATAHI and FDATALO bits are readable but are not writable. After an array write as part of a
command write sequence, the FDATA registers will contain the data written. At the completion of a data
compress operation, the resulting 16-bit signature is stored in the FDATA registers. The data compression
signature is readable in the FDATA registers until a new command write sequence is started.
2.3.2.12 RESERVED1
This register is reserved for factory testing and is not accessible.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-18. RESERVED1
All bits read 0 and are not writable.
2.3.2.13 RESERVED2
This register is reserved for factory testing and is not accessible.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 2-19. RESERVED2
All bits read 0 and are not writable.
MC9S12E256 Data Sheet, Rev. 1.08
100
Freescale Semiconductor