XRT72L52 Datasheet, PDF (49/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

áç
PRELIMINARY
XRT72L52
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.3
1.0 TIMING DIAGRAMS
FIGURE 3. TIMING DIAGRAM FOR TRANSMIT PAYLOAD INPUT INTERFACE, WHEN THE XRT72L52 DEVICE IS OPERAT-
ING IN BOTH THE DS3 AND LOOP-TIMING MODES
XRT72L5x Transmit Payload Data I/F Signals
t3
RxOutClk
TxSer
TxFrame
TxOH_Ind
Payload[4702] Payload[4703]
X-Bit
t2
t1
Payload[0]
t4
DS3 Frame Number N
DS3 Frame Number N + 1
FIGURE 4. TIMING DIAGRAM FOR THE TRANSMIT PAYLOAD INPUT INTERFACE, WHEN THE XRT72L52 DEVICE IS
OPERATING IN BOTH THE DS3 AND LOCAL-TIMING MODES
XRT72L5x Transmit Payload Data I/F Signals
t6
t5
TxInClk
TxSer
TxFrameRef
Payload[4702] ^{Payload[4703]}
TxOH_Ind
t8
t7
X-Bit
Payload[1]
t9
t10
DS3 Frame Number N DS3 Frame Number N + 1
30