XRT72L52 Datasheet, PDF (21/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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PRELIMINARY
XRT72L52
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.3
RXE3 CONFIGURATION & STATUS REGISTER 2 (ADDRESS = 0X11) ........................................................ 447
RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) ................................................................. 447
RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) ................................................................. 448
RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) ................................................................. 448
RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) ................................................................. 448
RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) ................................................................. 449
RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) ................................................................. 449
RXE3 CONFIGURATION & STATUS REGISTER 1 (ADDRESS = 0X10) ........................................................ 450
RXE3 INTERRUPT ENABLE REGISTER - 2 (ADDRESS = 0X13) ................................................................. 450
RXE3 INTERRUPT STATUS REGISTER - 2 (ADDRESS = 0X15) ................................................................. 450
RXE3 LAPD CONTROL REGISTER (ADDRESS = 0X18) ........................................................................... 451
RXE3 LAPD CONTROL REGISTER (ADDRESS = 0X18) ........................................................................... 451
7.0 diagnostic operation of the xrt72L52 framer ic .............................................................................. 452
Figure 213. Illustration of the Framer Local Loop-back path, within the XRT72L52 DS3/E3 Framer IC 452
8.0 High Speed HDLC Controller Mode of Operation ........................................................................... 454
8.1 CONFIGURING THE CHANNEL TO OPERATE IN THE HIGH SPEED HDLC CONTROLLER MODE ................................. 454
TABLE 93: ADDRESS LOCATIONS OF EACH OF THE HDLC CONTROL REGISTERS WITHIN THE XRT72L52 DE-
VICE. .................................................................................................................................................... 454
HDLC CONTROL REGISTER (ADDRESS = 0X82) ..................................................................................... 454
8.2 OPERATING THE HIGH SPEED HDLC CONTROLLER ............................................................................................ 454
8.2.1 Operating the Transmit HDLC Controller Block .................................................................................... 455
TABLE 94: DESCRIPTION OF EACH OF THE TRANSMIT HDLC CONTROLLER PINS .................................... 456
Figure 214. A Simple Illustration of an Outbound HDLC Frame, as assembled by the Transmit HDLC Con-
troller, when CRC-32 is selected. ........................................................................................................ 457
Figure 215. A Simple Illustration of an Outbound HDLC Frame, as assembled by the Transmit HDLC Con-
troller, when CRC-16 is selected. ........................................................................................................ 458
8.2.2 Operating the Receive HDLC Controller Block ..................................................................................... 458
TABLE 95: DESCRIPTION OF EACH OF THE RECEIVE HDLC CONTROLLER PINS ...................................... 459
ORDERING INFORMATION ........................................................................................ 460
PACKAGE DIMENSIONS ............................................................................................ 460
REVISION HISTORY ................................................................................................................................ 461
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