XRT72L52 Datasheet, PDF (188/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L52 TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.3
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PRELIMINARY
FIGURE 58. ILLUSTRATION OF THE SIGNAL THAT MUST OCCUR BETWEEN THE TERMINAL EQUIPMENT AND THE
XRT72L52, IN ORDER TO CONFIGURE THE XRT72L52 TO TRANSMIT A YELLOW ALARM TO THE REMOTE TERMINAL
EQUIPMENT
Terminal Equipment/XRT72L5x Interface Signals
TxOHClk
TxOHFrame
TxOHIns
TxOH
0 0- 1
2
3
4
5
6
7
8 8-
X bit = 0
Remaining Overhead Bits with DS3 Frame
X bit = 0
TxOHFrame is sample “high”
Terminal Equipment asserts
“TxOHIns” and data on “TxOH” line
XRT72L5x device samples the TxOHIns and
TxOH signals.
TxOHFrame is sample “high”
Terminal Equipment asserts
“TxOHIns” and data on “TxOH” line
XRT72L5x device samples the TxOHIns and
TxOH signals.
In Figure 58 the Terminal Equipment samples the Tx-
OHFrame signal being "High" at the rising clock edge
# 0. At this point, the Terminal Equipment knows that
the XRT72L52 is just about to process the very first
overhead bit within a given outbound DS3 frame. Ad-
ditionally, according to Table 22, the very first over-
head bit to be processed is the first X bit. In order to
facilitate the transmission of the Yellow Alarm, the
Terminal Equipment must set this X bit to 0. Hence,
the Terminal Equipment starts this process by imple-
menting the following steps concurrently.
a. Assert the TxOHIns input pin by setting it "High".
b. Set the TxOH input pin to 0.
After the Terminal Equipment has applied these sig-
nals, the XRT72L52 will sample the data on both the
TxOHIns and TxOH signals upon the very next falling
edge of TxOHClk (designated at 0- in Figure 58.
Once the XRT72L52 has sampled this data, it will
then insert a "0" into the first X bit position, in the out-
bound DS3 frame.
Upon detection of the very next rising edge of the Tx-
OHClk clock signal (designated as clock edge 1 in
Figure 58), the Terminal Equipment will negate the
TxOHIns signal (e.g., toggles it "Low") and will cease
inserting data into the Transmit Overhead Data Input
Interface, until rising clock edge # 8 (of the TxOHClk
signal). According to Table 22, rising clock edge # 8
indicates that the XRT72L52 is just about ready to
process the second X bit within the outbound DS3
frame. Once again, in order to facilitate the transmis-
sion of the Yellow Alarm this X-Bit must also be set to
0. Hence, the Terminal Equipment will (once again)
implement the following steps, concurrently.
a. Assert the TxOHIns input pin by setting it "High".
b. Set the TxOH input to 0.
Once again, after the Terminal Equipment has ap-
plied these signals, the XRT72L52 will sample the da-
ta on both the TxOHIns and TxOH signal upon the
very next falling edge of TxOHClk (designated as 8-
in Figure 58). Once the XRT72L52 has sampled this
data, it will then insert a "0" into the second X bit posi-
tion, in the outbound DS3 frame.
4.2.2.2 Method 2 - Using the TxInClk and TxO-
HEnable Signals
169