XRT72L52 Datasheet, PDF (38/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L52
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.3
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PRELIMINARY
PIN DESCRIPTION
PIN #
140
PIN NAME
TxOHIns[0]/
TxHDLCDat4[0]
141
VDD
142
TxOHEnable[0]/
TxHDLCDat7[0]
143
TxOHClk[0]
TYPE
I
****
O
I
O
DESCRIPTION
Transmit Overhead Data Insert Input:
Asserting this input signal (e.g., setting it "high") enables the Transmit
Overhead Data Input Interface to accept "overhead" data from the Ter-
minal Equipment. In other words, while this input pin is "high", the Trans-
mit Overhead Data Input Interface will sample the data at the "TxOH"
input pin, on the falling edge of the "TxOHClk" output signal.
Conversely, setting this pin "low" configures the "Transmit Overhead
Data Input Interface" to NOT sample (e.g., ignore) the data at the
"TxOH" input pin, on the falling edge of the "TxOHClk" output signal.
NOTE: If the Terminal Equipment attempts to insert an overhead bit that
cannot be accepted by the "Transmit Overhead Data Input Interface"
(e.g., if the Terminal Equipment asserts the "TxOHIns" signal, at a time
when one of these "non-insertable" overhead bits are being processed);
that particular insertion effort will be ignored.
Transmit HDLC Data Input - 4:
This pin accepts bit 4 TxHDLC data when the HDLC controller is turned
on.
Power Supply 3.3V + 5%
Transmit Overhead Input Enable:
The XRT72L52 will assert this signal, for one “TxInClk” period, just prior
to the instant that the “Transmit Overhead Data Input Interface” will be
sampling and processing an overhead bit.
If the Terminal Equipment intends to insert its own value for an over-
head bit, into the outbound DS3 or E3 frame, it is expected to sample
the state of this signal, upon the falling edge of “TxInClk”. Upon sam-
pling the “TxOHEnable” high, the Terminal Equipment should (1) place
the desired value of the overhead bit, onto the “TxOH” input pin and (2)
assert the “TxOHIns” input pin. The Transmit Overhead Data Input Inter-
face” block will sample and latch the data on the “TxOH” signal, upon
the rising edge of the very next “TxInClk” input signal.
Transmit HDLC Data Input - 7:
This pin accepts bit 7 TxHDLC data when the HDLC controller is turned
on.
Transmit Overhead Clock:
This output signal serves two purposes:
1. The Transmit Overhead Data Input Interface block will provide a rising
clock edge on this signal, one bit-period prior to the start to the instant
that the “Transmit Overhead Data Input Interface” block is processing an
overhead bit.
2. The Transmit Overhead Data Input Interface will sample the data at
the “TxOH” input pin, on the falling edge of this clock signal (provided
that the “TxOHIns” input pin is “HIGH”).
NOTE: The Transmit Overhead Data Input Interface block will supply a
clock edge for all overhead bits within the DS3 or E3 frame (via the
“TxOHClk” output signal). This includes those overhead bits that the
“Transmit Overhead Data Input Interface” will not accept from the Termi-
nal Equipment.
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