XRT72L52 Datasheet, PDF (423/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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PRELIMINARY
XRT72L52
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.3
FIGURE 194. THE STATE MACHINE DIAGRAM FOR THE RECEIVE E3 FRAMER E3 FRAME ACQUISITION/MAINTENANCE
ALGORITHM
FA1, FA2
Octet
Search
FA1 and FA2 octets are
detected once
FA1, FA2
Octet
Verification
FA1 and FA2 octets are
not detected
LOF
Condition
FA1 and FA2 octets
are verified once
1 or 3 ms of operating
in the OOF condition
(user-selectable)
OOF
Condition
3 consecutive
Valid Frames
4 consecutive
In-valid Frames
In Frame
Frame Maintenance
Mode
404