XRT72L52 Datasheet, PDF (17/480 Pages) Exar Corporation – TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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PRELIMINARY
XRT72L52
TWO CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.3
terface block of the XRT72L52 for Mode 2 (Serial/Local-Timed/Frame-Slave) Operation .................. 354
Figure 160. Behavior of the Terminal Interface signals between the XRT72L52 and the Terminal Equipment
(Mode 2 Operation) ............................................................................................................................. 355
FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) ..................................................................... 355
Figure 161. Illustration of the Terminal Equipment being interfaced to the Transmit Payload Data Input In-
terface block of the XRT72L52 for Mode 3 (Serial/Local-Timed/Frame-Master) Operation ................ 356
Figure 162. Behavior of the Terminal Interface signals between the XRT72L52 and the Terminal Equipment
(E3 Mode 3 Operation) ........................................................................................................................ 357
FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) ..................................................................... 357
Figure 163. Illustration of the Terminal Equipment being interfaced to the Transmit Payload Data Input In-
terface block of the XRT72L52 for Mode 4 (Nibble-Parallel/Loop-Timed) Operation .......................... 358
Figure 164. Behavior of the Terminal Interface signals between the XRT72L52 and the Terminal Equipment
(Mode 4 Operation) ............................................................................................................................. 359
FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) ..................................................................... 360
Figure 165. Illustration of the Terminal Equipment being interfaced to the Transmit Payload Data Input In-
terface block of the XRT72L52 for Mode 5 (Nibble-Parallel/Local-Time/Frame-Slave) Operation ..... 361
Figure 166. Behavior of the Terminal Interface signals between the XRT72L52 and the Terminal Equipment
(E3 Mode 5 Operation) ........................................................................................................................ 362
FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) ..................................................................... 362
Figure 167. Illustration of the Terminal Equipment being interfaced to the Transmit Payload Data Input In-
terface block of the XRT72L52 for Mode 6 Operation ......................................................................... 363
Figure 168. Behavior of the Terminal Interface signals between the XRT72L52 and the Terminal Equipment
(E3 Mode 6 Operation) ........................................................................................................................ 364
FRAMER OPERATING MODE REGISTER (ADDRESS = 0X00) ..................................................................... 364
6.2.2 The Transmit Overhead Data Input Interface ........................................................................................ 364
Figure 169. Simple Illustration of the Transmit Overhead Data Input Interface block ........................ 365
TABLE 72: A LISTING OF THE OVERHEAD BITS WITHIN THE E3 FRAME, AND THEIR POTENTIAL SOURCES, WITHIN
THE XRT72L52 IC ................................................................................................................................ 366
TABLE 73: DESCRIPTION OF METHOD 1 TRANSMIT OVERHEAD INPUT INTERFACE SIGNALS ..................... 368
Figure 170. Illustration of the Terminal Equipment being interfaced to the Transmit Overhead Data Input
Interface (Method 1) ............................................................................................................................ 369
TABLE 74: THE RELATIONSHIP BETWEEN THE NUMBER OF RISING CLOCK EDGES IN TXOHCLK, (SINCE "TXO-
HFRAME" WAS LAST SAMPLED "HIGH") TO THE E3 OVERHEAD BIT, THAT IS BEING PROCESSED ................ 370
Figure 171. Illustration of the signal that must occur between the Terminal Equipment and the XRT72L52,
in order to configure the XRT72L52 to transmit a Yellow Alarm to the remote terminal equipment ... 372
TABLE 75: DESCRIPTION OF METHOD 1 TRANSMIT OVERHEAD INPUT INTERFACE SIGNALS ..................... 373
Figure 172. Illustration of the Terminal Equipment being interfaced to the Transmit Overhead Data Input
Interface (Method 2) ............................................................................................................................ 374
TABLE 76: THE RELATIONSHIP BETWEEN THE NUMBER OF TXOHENABLE PULSES (SINCE THE LAST OCCURRENCE
OF THE TXOHFRAME PULSE) TO THE E3 OVERHEAD BIT, THAT IS BEING PROCESSED BY THE XRT72L52 375
Figure 173. Behavior of Transmit Overhead Data Input Interface signals between the XRT72L52 and the
Terminal Equipment (for Method 2) .................................................................................................... 377
6.2.3 The Transmit E3 HDLC Controller ........................................................................................................ 377
Figure 174. LAPD Message Frame Format ....................................................................................... 378
TABLE 77: THE LAPD MESSAGE TYPE AND THE CORRESPONDING VALUE OF THE FIRST BYTE, WITHIN THE INFOR-
MATION PAYLOAD .................................................................................................................................. 378
TRANSMIT E3 LAPD CONFIGURATION REGISTER (ADDRESS = 0X33) ..................................................... 379
TABLE 78: RELATIONSHIP BETWEEN TXLAPD MSG LENGTH AND THE LAPD MESSAGE SIZE .................. 379
TXE3 CONFIGURATION REGISTER (ADDRESS = 0X30) ............................................................................ 380
TXE3 LAPD CONFIGURATION REGISTER (ADDRESS = 0X33) ................................................................. 380
TRANSMIT E3 LAPD CONFIGURATION REGISTER (ADDRESS = 0X33) ..................................................... 380
TXE3 LAPD STATUS AND INTERRUPT REGISTER (ADDRESS = 0X34) ...................................................... 381
TXE3 LAPD STATUS AND INTERRUPT REGISTER (ADDRESS = 0X34) ...................................................... 382
Figure 175. Flow Chart depicting how to use the LAPD Transmitter (LAPD Transmitter is configured to re-
transmit the LAPD Message frame repeatedly at One-Second intervals) ........................................... 383
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