EP2C5T144I8N Datasheet, PDF (445/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1

IEEE 1149.1 (JTAG) Boundary-Scan Testing for Cyclone II Devices
■ Perform a SAMPLE/PRELOAD test cycle prior to the first EXTEST test
cycle to ensure that known data is present at the device pins when
the EXTEST mode is entered. If the OEJ update register contains a 0,
the data in the OUTJ update register is driven out. The state must be
known and correct to avoid contention with other devices in the
system.
■ Do not perform EXTEST testing during ICR. This instruction is
supported before or after ICR, but not during ICR. Use the
CONFIG_IO instruction to interrupt configuration, then perform
testing, or wait for configuration to complete.
■ If performing testing before configuration, hold the nCONFIG pin
low.
■ After configuration, any pins in a differential pin pair cannot be
tested. Therefore, performing BST after configuration requires
editing BSC group definitions that correspond to these differential
pin pairs. The BSC group should be redefined as an internal cell. See
the BSDL file for more information on editing.
For more information on boundary scan testing, contact Altera
Applications.
Boundary-Scan
Description
Language
(BSDL) Support
The Boundary-Scan Description Language (BSDL), a subset of VHDL,
provides a syntax that allows you to describe the features of an
IEEE Std. 1149.1 BST-capable device that can be tested. Test software
development systems then use the BSDL files for test generation,
analysis, and failure diagnostics. For more information, or to receive
BSDL files for IEEE Std. 1149.1-compliant Cyclone II devices, visit the
Altera web site at www.altera.com.
Conclusion
The IEEE Std. 1149.1 BST circuitry available in Cyclone II devices
provides a cost-effective and efficient way to test systems that contain
devices with tight lead spacing. Circuit boards with Altera and other
IEEE Std. 1149.1-compliant devices can use the EXTEST,
SAMPLE/PRELOAD, BYPASS, IDCODE, USERCODE, CLAMP, and HIGHZ
modes to create serial patterns that internally test the pin connections
between devices and check device operation.
References
Bleeker, H., P. van den Eijnden, and F. de Jong. Boundary-Scan Test: A
Practical Approach. Eindhoven, The Netherlands: Kluwer Academic
Publishers, 1993.
Institute of Electrical and Electronics Engineers, Inc. IEEE Standard Test
Access Port and Boundary-Scan Architecture (IEEE Std 1149.1-2001). New
York: Institute of Electrical and Electronics Engineers, Inc., 2001.
Altera Corporation
February 2007
14–19
Cyclone II Device Handbook, Volume 1