EP2C5T144I8N Datasheet, PDF (296/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1

Supported I/O Standards
Figure 10–12. 1.8-V Differential HSTL Class II Termination
VTT = 0.9 V VTT = 0.9 V
VTT = 0.9 V
VTT = 0.9 V
Differential
Transmitter
50 Ω
50 Ω
50 Ω
50 Ω
Differential
Receiver
Z0 = 50 Ω
Z0 = 50 Ω
1.5-V LVCMOS (EIA/JEDEC Standard JESD8-11)
The 1.5-V I/O standard is used for 1.5-V applications. This standard
defines the DC interface parameters for high-speed, low-voltage,
non-terminated digital circuits driving or being driven by other 1.5-V
devices.
The 1.5-V standard does not require input reference voltages or board
terminations. Cyclone II devices support input and output levels for
1.5-V LVCMOS.
1.5-V HSTL Class I and II
The 1.5-V HSTL standard is formulated under EIA/JEDEC Standard,
EIA/JESD8-6: A 1.5V Output Buffer Supply Voltage Based Interface
Standard for Digital Integrated Circuits.
The 1.5-V HSTL I/O standard is used for applications designed to operate
in the 0.0- to 1.5-V HSTL logic nominal switching range. This standard
defines single-ended input and output specifications for all
HSTL-compliant digital integrated circuits. The 1.5-V HSTL I/O standard
in Cyclone II devices is compatible with the 1.8-V HSTL I/O standard in
APEX™ 20KE, APEX 20KC, Stratix^® II, Stratix GX, Stratix, and in
Cyclone II devices themselves because the input and output voltage
thresholds are compatible. Refer to Figures 10–13 and 10–14. Cyclone II
devices support both input and output levels with V_REF and V_TT.
10–14
Cyclone II Device Handbook, Volume 1
Altera Corporation
February 2008