EP2C5T144I8N Datasheet, PDF (333/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1

High-Speed Differential Interfaces in Cyclone II Devices
Figure 11–10. mini-LVDS Resistor Network
Cyclone II Device
LVDS Transmitter
≤ 1 inch
Resistor Network
RS
RP
RS
50 Ω
50 Ω
Note to Figure 11–10:
(1) R_S = 120 Ω and R_P = 170 Ω.
mini-LVDS Receiver
RL = 100 Ω
mini-LVDS Software Support
When designing for the mini-LVDS I/O standard, assign the mini-LVDS
I/O standard to the I/O pins intended for mini-LVDS in the Quartus II
software. Contact Altera Applications for reference designs.
LVPECL Support in Cyclone II
The LVPECL I/O standard is a differential interface standard requiring a
3.3-V V_CCIO and is used in applications involving video graphics,
telecommunications, data communications, and clock distribution. The
high-speed, low-voltage swing LVPECL I/O standard uses a positive
power supply and is similar to LVDS. However, LVPECL has a larger
differential output voltage swing than LVDS. Cyclone II devices support
the LVPECL input standard at the clock input pins only. Table 11–4 shows
the LVPECL electrical characteristics for Cyclone II devices. Figure 11–11
shows the LVPECL I/O interface.
Table 11–4. LVPECL Electrical Characteristics for Cyclone II Devices
Symbol
V_CCIO
V_IH
V_IL
V_ID
Parameters
Output supply voltage
Input high voltage
Input low voltage
Differential input voltage
Condition
Min
Typ
3.135
3.3
2,100
0
Peak to peak
100
600
Max
3.465
2,880
2,200
950
Units
V
mV
mV
mV
Altera Corporation
February 2007
11–11
Cyclone II Device Handbook, Volume 1