EP2C5T144I8N Datasheet, PDF (372/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1

Active Serial Configuration (Serial Configuration Devices)
You should put a buffer before the DATA and DCLK output from the
master Cyclone II device to avoid signal strength and signal integrity
issues. The buffer should not significantly change the DATA-to-DCLK
relationships or delay them with respect to other AS signals (ASDI and
nCS). Also, the buffer should only drive the slave Cyclone II devices, so
that the timing between the master Cyclone II device and serial
configuration device is unaffected.
This configuration method supports both compressed and uncompressed
SOFs. Therefore, if the configuration bitstream size exceeds the capacity
of a serial configuration device, you can enable the compression feature
in the SOF file used or you can select a larger serial configuration device.
Estimating AS Configuration Time
The AS configuration time is the time it takes to transfer data from the
serial configuration device to the Cyclone II device. The Cyclone II DCLK
output (generated from an internal oscillator) clocks this serial interface.
As listed in Table 13–5, if you are using the 40-MHz oscillator, the DCLK
minimum frequency is 20 MHz (50 ns). Therefore, the maximum
configuration time estimate for an EP2C5 device (1,223,980 bits of
uncompressed data) is:
RBF size × (maximum DCLK period / 1 bit per DCLK cycle) =
estimated maximum configuration time
1,223,980 bits × (50 ns / 1 bit) = 61.2 ms
To estimate the typical configuration time, use the typical DCLK period
listed in Table 13–5. With a typical DCLK period of 38.46 ns, the typical
configuration time is 47.1 ms. Enabling compression reduces the amount
of configuration data that is transmitted to the Cyclone II device, which
also reduces configuration time. On average, compression reduces
configuration time by 50%.
13–18
Cyclone II Device Handbook, Volume 1
Altera Corporation
February 2007