EP2C8T144I8N Datasheet, PDF (246/470 Pages) Altera Corporation – Cyclone II Device Handbook, Volume 1

Clock Modes
Single-Clock Mode
Cyclone II memory blocks support single-clock mode for true dual-port,
simple dual-port, and single-port memory. In this mode, a single clock,
together with a clock enable, controls all registers of the memory block.
This mode does not support asynchronous clear signals for the registers.
Figures 8–18 through 8–20 show the memory block in single-clock mode
for true dual-port, simple dual-port, and single-port modes, respectively.
8–24
Cyclone II Device Handbook, Volume 1
Altera Corporation
February 2008