XC4VLX100-11FF1148C Datasheet, PDF (40/58 Pages) Xilinx, Inc – DC and Switching Characteristics

Virtex-4 FPGA Data Sheet: DC and Switching Characteristics
Table 47: Input Clock Tolerances
Symbol
Description
Frequency
Range
Value
Duty Cycle Input Tolerance (in %)
CLKIN_PSCLK_PULSE_RANGE_1
CLKIN_PSCLK_PULSE_RANGE_1_50
CLKIN_PSCLK_PULSE_RANGE_50_100
CLKIN_PSCLK_PULSE_RANGE_100_200
CLKIN_PSCLK_PULSE_RANGE_200_400
PSCLK only
PSCLK and CLKIN
< 1 MHz
1 – 50 MHz⁽¹⁾
50 – 100 MHz⁽¹⁾
100 – 200 MHz⁽¹⁾
200 – 400 MHz⁽¹⁾
25 - 75
25 - 75
30 - 70
40 - 60
45 - 55
CLKIN_PSCLK_PULSE_RANGE_400
> 400 MHz
45 - 55
Speed Grade
-12
-11
-10
Input Clock Cycle-Cycle Jitter (Low Frequency Mode)
CLKIN_CYC_JITT_DLL_LF
CLKIN (using DLL outputs)^(2,5,6)
CLKIN_CYC_JITT_FX_LF
CLKIN (using DFS outputs)⁽³⁾
±300
±300
±300
±300
±345
±345
Input Clock Cycle-Cycle Jitter (High Frequency Mode)
CLKIN_CYC_JITT_DLL_HF
CLKIN (using DLL outputs)^(2,5,6)
CLKIN_CYC_JITT_FX_HF
CLKIN (using DFS outputs)⁽³⁾
±150
±150
±150
±150
±173
±173
Input Clock Period Jitter (Low Frequency Mode)
CLKIN_PER_JITT_DLL_LF
CLKIN_PER_JITT_FX_LF
CLKIN (using DLL outputs)^(2,5,6)
CLKIN (using DFS outputs)⁽³⁾
±1.0
±1.0
±1.0
±1.15
±1.0
±1.15
Input Clock Period Jitter (High Frequency Mode)
CLKIN_PER_JITT_DLL_HF
CLKIN_PER_JITT_FX_HF
CLKIN (using DLL outputs)^(2,5,6)
CLKIN (using DFS outputs)⁽³⁾
±1.0
±1.0
±1.0
±1.15
±1.0
±1.15
Feedback Clock Path Delay Variation
CLKFB_DELAY_VAR_EXT
CLKFB off-chip feedback
±1.0
±1.0
±1.15
Notes:
1. For boundary frequencies, use the more restrictive specifications.
2. DLL Outputs are used in these instances to describe the outputs: CLK0, CLK90, CLK180, CLK270, CLK2X, CLK2X180, and CLKDV.
3. DFS Outputs are used in these instances to describe the outputs: CLKFX and CLKFX180.
4. If both DLL and DFS outputs are used, follow the more restrictive specifications.
5. The DCM must be reset if the clock input clock stops for more than 100 ms.
6. These values also apply when using both DLL and DFS outputs.
Units
%
%
%
%
%
%
ps
ps
ps
ps
ns
ns
ns
ns
ns
DS302 (v3.7) September 9, 2009
www.xilinx.com
Product Specification
40