XC4VLX100-11FF1148C Datasheet, PDF (17/58 Pages) Xilinx, Inc – DC and Switching Characteristics

Virtex-4 FPGA Data Sheet: DC and Switching Characteristics
Table 25: RocketIO Receiver Switching Characteristics
Description
Symbol
Conditions
Min Typ Max Units
Serial data rate, -10
F_GRX
Serial data rate, -11
F_GRX
XAUI Receive Jitter Tolerance (8B/10B CJPAT)⁽²⁾
Rate (Gb/s) Mode⁽³⁾
Frequency
0.622
0.622
3.125 Gb/s
6.5 Gb/s
Receive Deterministic Jitter Tolerance
Receive Total Jitter Tolerance
Receive Sinusoidal Jitter Tolerance
General Receive Jitter Tolerance
T_DJTOL
T_TJTOL(6)
T_SJTOL(7)
3.125
3.125
3.125
3.125
3.125
Rate (Gb/s)
6.5⁽⁵⁾
5.0⁽⁵⁾
4.25⁽⁵⁾
ACDR
ACDR
ACDR
ACDR
ACDR
Mode⁽³⁾
ACDR
ACDR
ACDR
f = 22.1 kHz
f = 1.875 MHz
f = 20 MHz
Pattern
PRBS7
PRBS7
PRBS7
0.37
0.65
8.5 UI⁽¹⁾
0.10
0.10
0.65
0.65
0.65
3.125
ACDR
PRBS7
0.60
Receive deterministic jitter tolerance T_DJTOL(2,4)
2.5
ACDR
PRBS7
0.55
1.25
ACDR
PRBS7
0.50
1.25
DCDR
PRBS7
0.50
1.25
DCDR
PRBS31
0.40
Sinusoidal jitter tolerance
T_SJTOL
0.622
6.5⁽⁹⁾
5.0⁽⁹⁾
4.25⁽⁹⁾
3.125 ⁽⁸⁾
2.5⁽⁸⁾
1.25⁽⁸⁾
1.25⁽⁸⁾
1.25⁽⁸⁾
0.622⁽⁸⁾
DCDR
ACDR
ACDR
ACDR
ACDR
ACDR
ACDR
DCDR
DCDR
DCDR
PRBS31
PRBS7
PRBS7
PRBS7
PRBS7
PRBS7
PRBS7
PRBS7
PRBS31
PRBS31
0.40
0.65
UI ⁽¹⁾
0.65
0.65
0.50
0.50
0.50
0.55
0.35
0.55
RXUSRCLK frequency
RXUSRCLK2 frequency
RXUSRCLK duty cycle
RXUSRCLK2 duty cycle
Differential input skew
Differential receive input sensitivity⁽²⁾
On-chip AC coupling corner frequency
T_RX
For slower speed grades = MaxDataRate/32
T_RX2
T_RXDC
40
T_RX2DC
40
T_ISKEW
V_EYE
110
250 MHz
250 MHz
60
%
60
%
20
ps
mV
Signal detect response time
RXSIGDET_Responsetime
Input capacitance at the Die
C_DIE
Excess capacitance at the solder ball
C_BALL
Notes:
1. UI = Unit Interval
6.
2. Using receiver equalization setting of 111 (14 dB).
3. ACDR = Analog CDR and DCDR = Digital CDR.
7.
4. Deterministic jitter (DJ) is composed of 75% ISI + 25% high frequency 8.
sinusoidal jitter (SJ).
9.
5. Deterministic Jitter (DJ) composed of ISI + 0.10 UI of high frequency SJ +
0.15 UI of RJ.
30
ns
fF
fF
Sum of DJ, random jitter (RJ) of at least 0.55 UI, and sinusoidal jitter
as defined by mask in IEEE Std 802.3ae-2002, Figure 47-5.
SJ in addition to 0.55 UI of DJ +RJ.
Jitter frequency = 5 MHz.
Jitter frequency = 10 MHz.
DS302 (v3.7) September 9, 2009
www.xilinx.com
Product Specification
17