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XC4VLX100-11FF1148C Datasheet, PDF (11/58 Pages) Xilinx, Inc – DC and Switching Characteristics
Virtex-4 FPGA Data Sheet: DC and Switching Characteristics
RocketIO DC Input and Output Levels
Table 12 summarizes the DC input and output specifica-
tions of the Virtex-4 FPGA RocketIO Multi-Gigabit Serial
Transceivers. Figure 1 shows the single-ended output volt-
Table 12: RocketIO DC Specifications
age swing. Figure 2 shows the peak-to-peak differential out-
put voltage. Consult the Virtex-4 RocketIO Multi-Gigabit
Transceiver User Guide for further details.
DC Parameter
Symbol
Conditions
Min Typ
Max
Units
Peak-to-Peak Differential Input Voltage
Single-Ended Input Range
Common Mode Input Voltage Range
Single-Ended Output Voltage Swing(2, 3)
Common Mode Output Voltage Range(3)
Peak-to-Peak Differential Output Voltage(2, 3)
Signal detect threshold
Electrical idle amplitude
RocketIO MGT Clock DC Input Levels
DVIN
SEVIN
VICM
Internal AC Coupled
Internal AC Coupled
Internal AC Coupled
Bypassed Internal AC
Coupled (1)
VOUT
VTCM
DVPPOUT
RXOOBVDPP RX
TXOOBVDPP TX
110
2400
mV
0
VTRX
mV
100
VTRX – 100 mV
800
mV
450
725
mV
1000
mV
900 1050
1400
mV
TBD
65
mV
Peak-to-Peak Differential Input Voltage
VIDIFF
2 x | VMGTCLKP – VMGTCKLN | 100 600
2000
mV
Differential Input Resistance
RIN
71 105
124
Ω
Notes:
1. The maximum VTRX is 1.26V when bypassing the internal AC coupled VICM. VTRX must be less than or equal to AVCCAUXRX.
2. The output swing and pre-emphasis levels are selected using the attributes discussed in Chapter 4: PMA Analog Considerations in the Virtex-4
RocketIO Multi-Gigabit Transceiver User Guide for details.
3. VTTX is 1.5 ± 5%; different amplitudes possible with adjusted DAC values.
+V TXP
TXN
0
+V
Figure 1: Single-Ended Output Voltage Swing
DVOUT
DS302_02_031708
0
DVPPOUT
–V TXP–TXN
Figure 2: Peak-to-Peak Differential Output Voltage
DS302_03_031708
DS302 (v3.7) September 9, 2009
www.xilinx.com
Product Specification
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