XC4VLX100-11FF1148C Datasheet, PDF (14/58 Pages) Xilinx, Inc – DC and Switching Characteristics

Virtex-4 FPGA Data Sheet: DC and Switching Characteristics
Table 16: Processor Block Switching Characteristics
Description
Symbol
Setup and Hold Relative to Clock (CPMC405CLOCK)
Clock and Power Management control inputs
Reset control inputs
Debug control inputs
Trace control inputs
External Interrupt Controller control inputs
Clock to Out
T_PPCDCK_CORECKI/
T_PPCCKD_CORECKI
T_PPCDCK_RSTCHIP/
T_PPCCKD_RSTCHIP
T_PPCDCK_EXBUSHAK/
T_PPCCKD_EXBUSHAK
T_PPCDCK_TRCDIS/
T_PPCCKD_TRCDIS
T_PPCDCK_CINPIRQ/
T_PPCCKD_CINPIRQ
Clock and Power Management control outputs
Reset control outputs
Debug control outputs
Trace control outputs
Clock
T_PPCCKO_CORESLP
T_PPCCKO_RSTCHIP
T_PPCCKO_DBGLDAPU
T_PPCCKO_TRCCYCLE
CPMC405CLOCK minimum pulse width, High T_CPWH
CPMC405CLOCK minimum pulse width, Low T_CPWL
Speed Grade
-12
-11
-10
0.60
0.65
0.74
0.20
0.20
0.23
0.60
0.65
0.74
0.20
0.20
0.23
0.60
0.65
0.74
0.20
0.20
0.23
0.60
0.65
0.74
0.20
0.20
0.23
1.04
1.15
1.40
0.20
0.20
0.23
1.35
1.51
1.74
1.44
1.59
1.83
1.34
1.48
1.70
1.52
1.68
1.83
1.11
1.25
1.43
1.11
1.25
1.43
Table 17: Processor Block PLB Switching Characteristics
Description
Setup and Hold Relative to Clock (PLBCLK)
Processor Local Bus (ICU/DCU) control inputs
Processor Local Bus (ICU/DCU) data inputs
Clock to Out
Processor Local Bus (ICU/DCU) control outputs
Processor Local Bus (ICU/DCU) address bus outputs
Processor Local Bus (ICU/DCU) data bus outputs
Symbol
T_PPCDCK_ICUBUSY/
T_PPCCKD_ICUBUSY
T_PPCDCK_ICURDDB/
T_PPCCKD_ICURDDB
T_PPCCKO_DCUABORT
T_PPCCKO_ICUABUS
T_PPCCKO_DCUWRDBUS
Speed Grade
-12
-11
-10
0.60
0.66
0.76
0.20
0.20
0.23
0.90
1.00
1.15
0.20
0.20
0.23
1.61
1.78
2.05
1.66
1.85
2.13
2.08
2.24
2.57
Table 18: Processor Block JTAG Switching Characteristics
Description
Symbol
Setup and Hold Relative to Clock (JTAGC405TCK)
JTAG control inputs
JTAG reset input
Clock to Out
T_PPCDCK_JTGTDI
T_PPCCKD_JTGTDI
T_PPCDCK_JTGTRSTN
T_PPCCKD_JTGTRSTN
JTAG control outputs
T_PPCCKO_JTGTDO
Speed Grade
-12
-11
-10
1.16
1.29
1.48
0.20
0.20
0.23
0.60
0.65
0.74
0.20
0.20
0.23
1.68
1.79
2.14
Units
ns, Min
ns, Min
ns, Min
ns, Min
ns, Min
ns, Max
ns, Max
ns, Max
ns, Max
ns, Min
ns, Min
Units
ns, Min
ns, Min
ns, Max
ns, Max
ns, Max
Units
ns, Min
ns, Min
ns, Max
DS302 (v3.7) September 9, 2009
www.xilinx.com
Product Specification
14