DS531 Datasheet, PDF (12/37 Pages) Xilinx, Inc – Four levels of dynamic master request priority

LogiCORE IP Processor Local Bus (PLB) v4.6 (v1.05a)
Table 3: PLB Pin Descriptions (Cont’d)
Port
Signal Name
Interface
I/O
Init
State
Description
P65 Sl_rdDBus[0:C_PLBV46_NUM_
Slave
I
SLAVES*C_PLBV46_
DWIDTH-1]
Slave read data bus
P66 Sl_rdWdAddr[0:C_PLBV46_NUM
Slave
I
_ SLAVES*4-1]
Slave read word address
P67 Sl_rearbitrate[0:C_PLBV46_NU
Slave
I
M_ SLAVES-1]
Slave rearbitrate bus indicator
P68 Sl_SSize[0:C_PLBV46_NUM_
SLAVES*2-1]
Slave
I
Slave data bus port size indicator
P69 Sl_wait[0:C_PLBV46_NUM_
SLAVES-1]
Slave
I
Slave wait indicator
P70 Sl_wrBTerm[0:C_PLBV46_NUM_
Slave
I
SLAVES-1]
Slave terminate write burst transfer
P71 Sl_wrComp[0:C_PLBV46_NUM_
Slave
I
SLAVES-1]
Slave write transfer complete
indicator
P72 Sl_wrDAck[0:C_PLBV46_NUM_
Slave
I
SLAVES-1]
Slave write data acknowledge
P73 Bus_Error_Det
System
O
0 Bus Error Interrupt
Interrupt
P74 Sl_MIRQ[0:C_PLBV46_NUM_
SLAVES*C_PLBV46_NUM_
MASTERS-1]
Slave
I
Master Interrupt Request (one per
master at each slave). Gives a slave
the ability to indicate that it has
encountered an event it deems
important to the master
P75 PLB_MIRQ[0:C_PLBV46_NUM_
MASTERS-1]
Slave
O
0 Master Interrupt Request. For each
master, indicates whether any slave
has encountered an event that it
deems important to the master
System Signals
P76 PLB_Clk
System
I
System clock
P77 SYS_Rst
System
I
External system reset
P78 PLB_Rst
System
O
0 Registered reset output from
arbitration logic
P79 SPLB_Rst[0:C_PLBV46_NUM_S System
O
0 Registered reset output from
LAVES-1]
arbitration logic for system slave
devices
P80 MPLB_Rst[0:C_PLBV46_NUM_
System
O
0 Registered reset output from
MASTERS-1]
arbitration logic for system master
devices
IBM PLB Toolkit Support⁽¹⁾
P81 PLB_SaddrAck
Simulation O
0 Output of slave Sl_addrAck OR gate
P82 PLB_Swait
Simulation O
0 Output of slave Sl_wait OR gate
P83 PLB_Srearbitrate
Simulation O
0 Output of slave Sl_rearbitrate OR
gate
DS531 September 21, 2010
www.xilinx.com
12
Product Specification