W6692 Datasheet, PDF (97/104 Pages) Winbond – PCI Bus ISDN S/T-Controller

Preliminary Data Sheet
W6692 PCI ISDN S/T-Controller
Parameter
ta1
ta2
ta3
ta4
ta5
ta6
ta7
ta8
Parameter Descriptions
PBCK pulse high
PBCK pulse low
Frame clock asserted from
PBCK
PTXD data delay from PBCK
Frame clock deasserted from
PBCK
PTXD hold time from PBCK
PRXD setup time to PBCK
PRXD hold time from PBCK
Min.
260
260
10
20
10
Max.
20
20
20
Remarks
Unit = ns
9.4.2 Serial EEPROM Timing
EPSK
EPCS
EPSDI
tb1 tb2
tb3
tb3
tb4
tb4
tb6
tb5
tb7
A5 A4 ..... A1 A0
D15 D14 ....... D1 D0
Parameter
tb1
tb2
tb3
tb4
tb5
tb6
tb7
Parameter Descriptions
EPSK low
EPSK high
EPCS output delay
EPSD output delay
EPSD tri-state delay
EPSD input setup time
EPSD input hold time
Min.
2500
2500
30
30
Max. Remarks
Unit = ns
30
30
30
9.4.3 Peripheral Interface Timing
8-bit microprocessor timing when XMODE = 1:
-97 -
Publication Release Date: Sep 30, 1999
Revision 0.9