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W6692 Datasheet, PDF (35/104 Pages) Winbond – PCI Bus ISDN S/T-Controller
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Preliminary Data Sheet
W6692 PCI ISDN S/T-Controller
- Multiframe synchronization: Synchronization is achived when the M bit pattern has been correctly received during
20 consecutive frames starting from frame number 1.
Note: Criterion for multiframe synchronization is not defined in I.430 Recommendation.
- S bits receive and detect: When synchronization is achieved, the four received S bits in frames 1,6,11,16 are stored
as S1 to S4 in the SQR register respectively. A change in the recived four bits (S1-4) is indicated by an interrupt
(ISC in D_EXIR register and SCC in CIR register).
- Multiframe synchronization monitoring: Multiframe synchronization is constantly monitored. The synchronization
state is indicated by the MSYN bit in the SQR register.
- Q bits transmit and FA mirroring: When multiframe synchronization is achived, the four bits Q1-4 stored in the
SQXR register are transmitted as the four Q bits (FA-bit position) in frames 1,6,11 and 16. Otherwise the FA bit
transmitted is a mirror of the received FA-bit. At loss of synchronization, the mirroring is resumed at the next FA-
bit.
- The multiframe synchronization can be disabled by setting MFD bit in the D_MODE register.
- According to I.430 Recommendation, the S/Q channel can be used as operation and maintenance signalling
channel. At transmitter, a S/Q code for a message shall be repeated at least six times or as many as necessary to
obtain the desired response. At receiver, a message shall be considered received only when the proper codes is
received three consecutive times.
TABLE 7.6 Multiframe structure in S/T interface
Frame Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
NT-to-TE
FA-bit position
ONE
ZERO
ZERO
ZERO
ZERO
ONE
ZERO
ZERO
ZERO
ZERO
ONE
ZERO
ZERO
ZERO
ZERO
ONE
ZERO
ZERO
ZERO
ZERO
NT-to-TE
M bit
ONE
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
ZERO
NT-to-TE
S bit
S1
ZERO
ZERO
ZERO
ZERO
S2
ZERO
ZERO
ZERO
ZERO
S3
ZERO
ZERO
ZERO
ZERO
S4
ZERO
ZERO
ZERO
ZERO
TE-to-NT
FA-bit position
Q1
ZERO
ZERO
ZERO
ZERO
Q2
ZERO
ZERO
ZERO
ZERO
Q3
ZERO
ZERO
ZERO
ZERO
Q4
ZERO
ZERO
ZERO
ZERO
-35 -
Publication Release Date: Sep 30, 1999
Revision 0.9
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