W6692 Datasheet, PDF (66/104 Pages) Winbond – PCI Bus ISDN S/T-Controller

Preliminary Data Sheet
0: Pin IO10's output driver is disabled.
1: Pin IO10's output driver is enabled.
W6692 PCI ISDN S/T-Controller
OE4 Direction Control for IO9-8
Used when XMODE=0 only.
0: Pin IO9-8's output drivers are disabled.
1: Pin IO9-8's output drivers are enabled.
OE3 Direction Control for IO7-6
Used when XMODE=0 only.
0: Pin IO7-6's output drivers are disabled.
1: Pin IO7-6's output drivers are enabled.
OE2 Direction Control for IO5-4
Used when XMODE=0 only.
0 : Pin IO5-4's output drivers are disabled.
1 : Pin IO5-4's output drivers are enabled.
OE1 Direction Control for IO3-2
Used when XMODE=0 only.
0 : Pin IO3-2's output drivers are disabled.
1 : Pin IO3-2's output drivers are enabled.
OE0 Direction Control for IO1-0
Used when XMODE=0 only.
0 : Pin IO1-0's output drivers are disabled.
1 : Pin IO1-0's output drivers are enabled.
XMODE Peripheral Bus Mode
0: Simple programmable IO. This is the default state. XADDR register and XDATA register are used for data access.
1: 8-bit multiplexed microprocessor bus. Pins IO7-0 are used as XAD7-0, IO8 as XALE, IO9 as XRDB and IO10 as XWRB.
XADDR register is used for peripheral address generation and XDATA register is used for peripheral data access.
PXC PCM Cross-connect
This bit determines whether or not the PCM ports are cross-connected with the B channel ports. The setting of PXC is
independent of the BSW1-0 bits.
PXC
Connection
0 PCM1 ↔ B1, PCM2 ↔ B2
1 PCM1 ↔ B2, PCM2 ↔ B1
8.1.28 Monitor Receive Channel 0
MO0R
Read
Address 6CH/1BH
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Publication Release Date: Sep 30, 1999
Revision 0.9