W6692 Datasheet, PDF (90/104 Pages) Winbond – PCI Bus ISDN S/T-Controller

Preliminary Data Sheet
Default: FFFF FFFF _H
W6692 PCI ISDN S/T-Controller
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Subsystem ID
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Subsystem Vendor ID
Bits 31-16 Subsystem ID Read_only
Assigned by card vendor. Subsystem ID is loaded from EEPROM after power on reset, if EEPROM is not empty.
The default value is FFFF _H, if EEPROM is empty.
Bits 15-0 Subsystem Vendor ID Read_only
Subsystem Vendor ID is assigned by the PCI SIG to ensure uniqueness. The value is loaded from EEPROM after power on
reset_, if EEPROM is not empty.
The default value is FFFF _H, if EEPROM is empty.
8.4.8 Interrupt Line Register
Read/Write
Address 3C_H
PCI Configuration Address: 3C_H
Default: 0000 0100 _H
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Max_Latency Timer
Min_GNT Timer
15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Interrupt Pin
Interrupt Line
Bits 31-24 Max_Latency Timer Read_only
This register is hardwired to 0, indicating no major requirements for the settings of Latency Timers.
Bits 23-16 Min_GNT Timer Read_only
This register is hardwired to 0.
Bits 15-8 Interrupt Pin Read_only
This register is hardwired to 01_H to specify that INTA# is the interrupt pin used.
Bits 7-0 Interrupt Line R/W
This 8-bit register is used to communicate interrupt line routing information. BIOS or OS software must write the routing
information into this register as it initializes and configures the system.
8.4.9 Capability Pointer
PCI Configuration Address: 34_H
Read
Address 34_H
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Publication Release Date: Sep 30, 1999
Revision 0.9