W6692 Datasheet, PDF (19/104 Pages) Winbond – PCI Bus ISDN S/T-Controller

Preliminary Data Sheet
W6692 PCI ISDN S/T-Controller
The peripheral control block is used to control other peripheral devices such as CODEC, SLIC, DTMF detector, LEDs.
7.2 Layer 1 Functions Descriptions
The layer 1 functions includes :
- Transmitter/Receiver which conform to the electrical specifications of ITU-T I.430
- Receiver clock recovery and timing generation
- Output phase delay (deviation) compensation
- Layer 1 activation/deactivation procedures
- D channel access control
- Frame alignment
- Multi-frame synchronization
- Test functions
7.2.1 S/T Interface Transmitter/Receiver
According to ITU-T I.430, pseudo-ternary code with 100% pulse width is used in both directions of transmission on the S/T
interface. The binary "1" is represented by no line signal (zero volt), whereas a binary "0" is represented by a positive or negative
pulse.
Data transmissions on the S/T interface are arranged as frame structures. The frame is 250 µs long and consists of 48 bits,
which corresponds to a 192 kbit/s line rate. Each frame carries two octets of B1 channel, two octets of B2 channel and four D
channel bits. Therefore, the 2B+D data rate is 144 kbit/s. The frame structure is shown in Fig.7.1.
The frame begin is marked by a framing bit, which is followed by a DC balancing bit. The first binary "0" following the
framing bit balancing bit is of the same polarity as the framing bit balancing bit, and subsequent binary zeros must alternate in
polarity.
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Publication Release Date: Sep 30, 1999
Revision 0.9