W6692 Datasheet, PDF (27/104 Pages) Winbond – PCI Bus ISDN S/T-Controller

Preliminary Data Sheet
W6692 PCI ISDN S/T-Controller
each state octagon are the state outputs. For example, at "F3 Deactivated with clock" state, the layer 1 will stay at this state if the
command is "ECK" and the INFO 0 is received on S interface. At this state, it provides "CE" indication to the microprocessor
and transmits INFO 0 on S interface. The "AR8/10" command causes transition to F4 and non-INFO 0 signal causes transition to
F5. Note that the command code writtern by the microprocessor in CIX register and indication code written by layer 1 in CIR
register are transmitted repeatedly until a new code is written.
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Publication Release Date: Sep 30, 1999
Revision 0.9