W6692 Datasheet, PDF (60/104 Pages) Winbond – PCI Bus ISDN S/T-Controller

Preliminary Data Sheet
W6692 PCI ISDN S/T-Controller
SAM7 SAM6 SAM5 SAM4 SAM3 SAM2 SAM1 SAM0
This register masks(disables) the first byte address comparison of the incoming frame. If the mask bit is "1" the corresponding
bit comparisons with D_SAP1, D_SAP2 are disabled. Comparison with SAPG is always performed.
Note : For the LAPD frame, the least significant two bits are the C/R bit and EA =0 bit. It is suggested that the comparison
with C/R bit be masked. EA=0 for two octet address frame e.g LAPD, EA=1 for one octet address frame.
8.1.13 D_ch SAPI1 Register D_SAP1 Read/Write Address 30H/0CH
Value after reset: 00H
7
SA17
6
SA16
5
SA15
4
SA14
3
SA13
2
SA12
1
SA11
0
SA10
This register contains the first choice of the first byte address of received frame. For LAPD frame, SA17 - SA12 is the SAPI
value, SA11 is C/R bit and SA10 is zero.
8.1.14 D_ch SAPI2 Register D_SAP2 Read/Write Address 34H/0DH
Value after reset: 00H
7
SA27
6
SA26
5
SA25
4
SA24
3
SA23
2
SA22
1
SA21
0
SA20
This register contains the second choice of the first byte address of received frame. For LAPD frame, SA27 - SA22 is the SAPI
value, SA21 is C/R bit and SA20 is zero.
8.1.15 D_ch TEI Address Mask D_TAM Read/Write Address 38H/0EH
Value after reset: 00H
7
6
5
4
3
2
1
0
TAM7 TAM6 TAM5 TAM4 TAM3 TAM2 TAM1 TAM0
This register masks (disables) the second byte address comparison of the incoming frame. If the mask bit is "1" the
corresponding bit comparisons with D_TEI1, D_TEI2 are disabled. Comparison with TEIG is always performed.
Note : For the LAPD frame, the least significant bit is the EA =1 bit.
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Publication Release Date: Sep 30, 1999
Revision 0.9