W6692 Datasheet, PDF (40/104 Pages) Winbond – PCI Bus ISDN S/T-Controller

Preliminary Data Sheet
7.5 PCM Port
W6692 PCI ISDN S/T-Controller
There are two PCM ports in W6692. Each PCM port can connect to a PCM codec filter chip. These two PCM ports share the
same signals except for the frame synchronization clocks. The frame synchronization clocks (PFCK1-2) are 8 kHz and the bit
synchronization clock (PBCK) is 1.536 MHz. The bit data rate is 64 kbps per port.
7.6 D Channel HDLC Controller
There are two HDLC protocols that are used for ISDN layer 2 functions : LAPD and LAPB. Their frame formats are shown
below.
LAPB modulo 8 :
flag address control
(1 octet) (1octet) (1octet)
information
(0 or N octets)
FCS
flag
(2 octets) (1 octet)
Control field bits
I frame
S frame
U frame
76543210
N(R)
P
N(S)
0
N(R)
P/F S S 0 1
M M M P/F M M 1 1
LAPB modulo 128 :
flag address control
(1 octet) (1octet) (1 or 2 octets)
information
(0 or N octets)
FCS
flag
(2 octets) (1 octet)
Control field bits
I frame
S frame
U frame
1st octet
2nd octet
7654321076543210
N(S)
0
N(R)
P
XXXXS S 0 1
N(R)
P/F
M M M P/F M M 1 1
LAPD : modulo 128 only
flag
address
(1 octet) (2 octets)
control
(2 octets)
information
(0 or N octets)
FCS
(2 octets)
flag
(1 octet)
Control field bits
I frame
1st octet
2nd octet
7654321076543210
N(S)
0
N(R)
P/F
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Publication Release Date: Sep 30, 1999
Revision 0.9