W6692 Datasheet, PDF (81/104 Pages) Winbond – PCI Bus ISDN S/T-Controller

Preliminary Data Sheet
W6692 PCI ISDN S/T-Controller
XDOW Transmit Data Overwritten
At least one byte of data has been overwritten in the B1_XFIFO. This bit is cleared only by XRST command.
XBZ Transmitter Busy
The B1_HDLC transmitter is busy when XBZ is read as "1". This bit may be polled. The XBZ bit is active when an XMS
command was issued and the message has not been completely transmitted.
8.2.8 B1_ch Address Mask Register 1 B1_ADM1 Read/Write
Address 9CH/27H
Value after reset: 00H
7
6
5
4
3
2
1
0
MA17 MA16 MA15 MA14 MA13 MA12 MA11 MA10
MA17-10 Address Mask Bits
Used in transparent mode only. These bits mask the first byte address comparisons. If the mask bit is "1", the corresponding bit
comparison with B1_ADR1 is disabled.
0: Unmask comparison
1: Mask comparison
8.2.9 B1_ch Address Mask Register 2 B1_ADM2 Read/Write
Address A0H/28H
Value after reset: 00H
7
6
5
4
3
2
1
0
MA27 MA26 MA25 MA24 MA23 MA22 MA21 MA20
MA27-20 Address Mask Bits
Used in transparent mode only. These bits mask the second byte address comparisons. If the mask bit is "1", the corresponding
bit comparison with B1_ADR2 is disabled.
0: Unmask comparison
1: Mask comparison
8.2.10 B1_ch Address Register 1 B1_ADR1 Read/Write
Value after reset: 00H
7
6
5
4
3
2
1
0
RA17 RA16 RA15 RA14 RA13 RA12 RA11 RA10
Address A4H/29H
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Publication Release Date: Sep 30, 1999
Revision 0.9