W6692 Datasheet, PDF (61/104 Pages) Winbond – PCI Bus ISDN S/T-Controller

Preliminary Data Sheet
8.1.16 D_ch TEI1 Register D_TEI1 Read/Write
W6692 PCI ISDN S/T-Controller
Address 3CH/0FH
Value after reset: 00H
7
TA17
6
TA16
5
TA15
4
TA14
3
TA13
2
TA12
1
TA11
0
TA10
TA17 - TA10
This register contains the first choice of the second byte address of received frame. For LAPD frame, TA17 - TA11 is the TEI
value, TA10 is EA = 1.
8.1.17 D_ch TEI2 Register D_TEI2 Read/Write
Address 40H/10H
Value after reset: 00H
7
TA27
6
TA26
5
TA25
4
TA24
3
TA23
2
TA22
1
TA21
0
TA20
TA27 - TA20
This register contains the second choice of the second byte address of received frame. For LAPD frame, TA27 - TA21 is the
TEI value, TA20 is EA = 1.
8.1.18 D_ch Receive Frame Byte Count High D_RBCH Read Address 44H/11H
Value after reset: 00H
7
6
5
4
3
2
1
0
VN1 VN0 LOV RBC12 RBC11 RBC10 RBC9 RBC8
VN1-0 Chip Version Number
This is the chip version number. It is read as 01B.
LOV Length Overflow
A "1" in this bit indicates ≥ 8192 bytes are received and the frame is not yet complete. This bit is valid only after an D_RME
interrupt and remains valid until the frame is acknowledge via the RACK command.
RBC12-8 Receive Byte Count
Four most significant bits of the total frame length. These bits are valid only after an D_RME interrupt and remain valid until the
frame is acknowledge via the RACK command.
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Publication Release Date: Sep 30, 1999
Revision 0.9