W88113C Datasheet, PDF (79/102 Pages) Winbond – ATAPI CD-ROM DECODER & CONTROLLER

W88113C
5. APPLICATION NOTES
5.1 DRAM Interface
5.1.1 Memory Layout
The whole DRAM can be divided into Sector Data Area and Working Area. Sectors from DSP are
buffered into Sector Data Area and then are retrieved for ECC/EDC operation. Some information is
stored in working area for transfer to host on request, for example, TOC.
Sector data buffering is a block-based ring operation. If the decoded-block-number in DDBH/L
(29h/28h) is N - 1, the sector is buffered into block with number N. The decoded-block-number is
automatically incremented by one at each sync. When the decoded-block-number equals the value
in WBRCH/L (57h/56h), the sector is buffered into the block with number specified by WBRBH/L
(55h/54h).
The data transfer is also a block-based ring operation if multi-block-transfer is used. The transfer ring
is controlled by DTRCH/L (53h/52h) and DTRBH/L (51h/50h). The buffer ring and transfer ring are
usually defined in the same range.
Ring Ceiling
block number
wrap around
Ring Base
Working
Area
1FFFFh
1E000h
block size is
A00h if RLC=3
or
C00h if RLC=2
1D600h
block #2Fh
block #2Dh
Ring Ceiling = 2Fh
Sector
Data
Area
01400h
00A00h
00000h
block #01h
block #00h
Ring Base = 00h
Illustration Diagram for Memory Layout
Example: 128K x 8, RLC[1:0](2Bh.1-0) = 3
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Publication Release Date: Mar. 1999
Revision 0.61