W88113C Datasheet, PDF (36/102 Pages) Winbond – ATAPI CD-ROM DECODER & CONTROLLER

W88113C
CCTL1 - Clock Control Register 1 - (write 1Ah)
This register is 0 after chip reset.
Bit 7: CLKOEN
Setting this bit high enable pin CLKO (13) as clock output if APOUT (90h.1-0) is zero.
CLKOEN (1Ah.7) APOUT1-0 (90h.1-0)
Function of pin 13
Remark
0
0
tri-state with internal pull-up
default
1
0
clock output
x
not 0
audio LRCK output
Bit 6: TSYNC - Test Synchronization Control
When this bit is high, the detected/inserted sync can be monitored from pin CLKO (13).
Bit 5: XININV - Inverted XIN as System Clock
When this bit is high, the internal system clock is inverted from crystal input pin XIN (15).
Bit 4: PSKEN - Programmable System Clock Enable
When this bit is high, the frequency of internal system clock is controlled by register PSKCTL
(59h).
Bit 3,2: CLK[1:0] - Pin CLKO Select
CLK1-0
Frequency of CLKO
Remark
0
SF ÷ 2
default
1
SF ÷ 4
2
SF ÷ 1
3
reserved
SF is the system frequency. Notice that the relation between system frequency and crystal
frequency depends on the setting of XTALD2 (1Ah.w0) and PSKEN (1Ah.w4).
Bit 1: Reserved
Bit 0: XTALD2 - Crystal Divided by 2
The internal clock frequency is half of crystal frequency if this bit is high.
VER - Version Register - (read 1Ah)
This register is used to hold the version number.
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Publication Release Date: Mar. 1999
Revision 0.61