W88113C Datasheet, PDF (44/102 Pages) Winbond – ATAPI CD-ROM DECODER & CONTROLLER

W88113C
Bit 1-0: RLC[1:0] - External RAM Layout Configuration Bits
The memory layout configuration should be set as shown in the following table:
RLC[1:0]
Block Size
0,1
--
2
C00h
3
A00h
The block size should be set as C00h if C2WEN (10h.w2) is enabled.
SICTL1 - Subcode Interface Control Register 1 - (write 2Ch)
Bit 7: SBXCK - Subcode External Clock
The external clock from pin EXCK (20) is used by the subcode logic if this bit is high.
Bit 6: SCEN - Subcode Enable
Setting this bit high enables the subcode logic.
Bit 5: CD2SC - Clock Divided By 2 For Subcode Logic
The subcode clock is divided by two if this bit is high.
Bit 4: SCIEN - Subcode Interrupt Enable
Setting this bit high enables subcode interrupts.
Bit 3: EXINV - External Clock Invert Select
If EXOP (2Ch.w2) is high, setting this bit high selects an inverted clock output at pin EXCK
(20).
Bit 2: EXOP - Pin EXCK Operation
Setting this bit high sets pin EXCK (20) as an output.
Bit 1-0: SCF[1:0] - Subcode Format Select
SCF[1:0]
Subcode Format
0
SMD0 (Philips)
1
SMD1 (EIAJ-1)
2
SMD2 (EIAJ-2)
3
Reserved
- 40 -
Publication Release Date: Mar. 1999
Revision 0.61