W88113C Datasheet, PDF (52/102 Pages) Winbond – ATAPI CD-ROM DECODER & CONTROLLER

W88113C
ATBLO - ATAPI Byte Count Low (read/write 34h)
This register is set as 14h by chip reset, host reset, SRST or triggering SIGT (17h.w4). This register
is set as 00h by Execute Drive Diagnostics Command.
ATBHI - ATAPI Byte Count High (read/write 35h)
This register is set as EBh by chip reset, host reset, SRST or triggering SIGT (17h.w4). This register
is set as 00h by Execute Drive Diagnostics Command.
ATDRS - ATAPI Drive Select (read/write 36h)
This register is set as 00h by the following:
• Chip reset or host reset
• SRST
• Execute Drive Diagnostics Command
Note that this register is not changed by triggering SIGT (17h.w4).
ATSTA - ATAPI Status Register (write 37h/read 38h)
This register is set as x0000000b by chip reset, host reset. This register is set as x00x0000b by
SRST, Execute Drive Diagnostics Command, or triggering SIGT (17h.w4).Note that BSY is not
changed by writing register ATSTA (37h).
ATCMD - ATAPI Command Register (read 37h)
This register is used to latched the command opcode written from host without default value.
ASSTA - ATAPI Shadow Status Register - (write 38h)
Bit 0: SCHECK - Shadow Check Bit
If configured as a Master drive, the firmware should set SCHECK following each host write to
ATCMD to comply with ATAPI specification. Bit-7 of Shadow Status Register is the same as
BSY of Status Register. Bit 6-1 of Shadow Status Register are all 0s. SCHECK is de-
activated by chip reset, host reset, or host writes to Command Register regardless of which
drive is selected.
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Publication Release Date: Mar. 1999
Revision 0.61