W632GU8KB Datasheet, PDF (59/160 Pages) Winbond – 32M X 8 BANKS X 8 BIT DDR3L SDRAM

W632GU8KB
CK#
CK
Command^*3
Address^*4
DQS, DQS#
DQ^*2
T0
T1
WRITE
Bank
Col n
NOP
T2
T3
NOP
NOP
WL = AL + CWL
T4
T5
T6
T7
T8
T9
NOP
NOP
NOP
NOP
NOP
NOP
tWPRE
tWPST
Din
Din
Din
Din
Din
Din
Din
Din
n
n+1
n+2
n+3
n+4
n+5
n+6
n+7
T10
NOP
TRANSITIONING DATA
Notes:
1. BL8, WL = 5; AL = 0, CWL = 5.
2. Din n = data-in from column n.
3. NOP commands are shown for ease of illustration; other commands may be valid at these times.
4. BL8 setting activated by either MR0 A[1:0] = 00 or MR0 A[1:0] = 01 and A12 = 1 during WRITE command at T0.
Figure 43 – WRITE Burst Operation WL = 5 (AL = 0, CWL = 5, BL8)
DON'T CARE
T0
T1
T5
T6
T9
T10
T11
T12
T13
T14
T15
CK#
CK
Command^*3
WRITE
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
AL = 5
CWL = 5
Address^*4
Bank
Col n
tWPRE
tWPST
DQS, DQS#
DQ^*2
WL = AL + CWL
Din
Din
Din
Din
Din
Din
Din
Din
n
n+1
n+2
n+3
n+4
n+5
n+6
n+7
TIME BREAK
TRANSITIONING DATA
Notes:
1. BL8, WL = 10; AL = CL - 1, CL = 6, CWL = 5.
2. Din n = data-in from column n.
3. NOP commands are shown for ease of illustration; other commands may be valid at these times.
4. BL8 setting activated by either MR0 A[1:0] = 00 or MR0 A[1:0] = 01 and A12 = 1 during WRITE command at T0.
Figure 44 – WRITE Burst Operation WL = 10 (AL = CL-1, CWL = 5, BL8)
DON'T CARE
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Publication Release Date: Jan. 20, 2015
Revision: A05