English
Language : 

W632GU8KB Datasheet, PDF (26/160 Pages) Winbond – 32M X 8 BANKS X 8 BIT DDR3L SDRAM
W632GU8KB
8.7 DLL on/off switching procedure
DDR3L DLL-off mode is entered by setting MR1 bit A0 to “1”; this will disable the DLL for subsequent
operations until A0 bit is set back to “0”.
8.7.1 DLL “on” to DLL “off” Procedure
To switch from DLL “on” to DLL “off” requires the frequency to be changed during Self-Refresh, as
outlined in the following procedure:
1. Starting from Idle state (All banks pre-charged, all timings fulfilled, and DRAMs On-die Termination
resistors, RTT, must be in high impedance state before MRS to MR1 to disable the DLL.)
2. Set MR1 bit A0 to “1” to disable the DLL.
3. Wait tMOD.
4. Enter Self Refresh Mode; wait until (tCKSRE) is satisfied.
5. Change frequency, in guidance with section 8.8 “Input clock frequency change” on page 28.
6. Wait until a stable clock is available for at least (tCKSRX) at DRAM inputs.
7. Starting with the Self Refresh Exit command, CKE must continuously be registered HIGH until all
tMOD timings from any MRS command are satisfied. In addition, if any ODT features were enabled
in the mode registers when Self Refresh mode was entered, the ODT signal must continuously be
registered LOW until all tMOD timings from any MRS command are satisfied. If both ODT features
were disabled in the mode registers when Self Refresh mode was entered, ODT signal can be
registered LOW or HIGH.
8. Wait tXS, then set Mode Registers with appropriate values (especially an update of CL, CWL and
WR may be necessary. A ZQCL command may also be issued after tXS).
9. Wait for tMOD, then DRAM is ready for next command.
T0
CK#
CK
CKE
T1
Ta0
Ta1
Tb0
Tc0
Td0
Td1
Te0
Te1
Tf0
VALID*8
Command
MRS*2
NOP
SRE*3
NOP
SRX*6
NOP
MRS*7
NOP
VALID*8
*1
tMOD
tCKSRE
*4
tCKSRX*5
tXS
tMOD
tCKESR
ODT
ODT: Static LOW in case Rtt_Nom and Rtt_WR is enabled, otherwise static Low or High
Notes:
1. Starting with Idle state, RTT in Hi-Z state
2. Disable DLL by setting MR1 Bit A0 to 1
3. Enter SR
4. Change Frequency
5. Clock must be stable tCKSRX
6. Exit SR
7. Update Mode register with DLL off parameters setting
8. Any valid command
TIME BREAK
Figure 10 – DLL Switch Sequence from DLL-on to DLL-off
VALID8
DON'T CARE
- 26 -
Publication Release Date: Jan. 20, 2015
Revision: A05