W632GU8KB Datasheet, PDF (16/160 Pages) Winbond – 32M X 8 BANKS X 8 BIT DDR3L SDRAM

W632GU8KB
The MRS command to Non-MRS command delay, tMOD is required for the DRAM to update the
features, except DLL reset, and is the minimum time required from a MRS command to a non-MRS
command excluding NOP and DES shown in Figure 4.
T0
CK#
CK
Command
VALID
T1
VALID
T2
VALID
Ta0
Ta1
Ta2
Ta3
Ta4
Tb0
Tb1
MRS
NOP/DES
NOP/DES
NOP/DES
NOP/DES
NOP/DES
VALID
Tb2
VALID
Address
VALID
VALID
VALID
VALID
VALID
VALID
VALID
VALID
VALID
VALID
VALID
CKE
Settings
Old settings
Rtt_Nom ENABLED prior and/or after MRS command
ODT
VALID
VALID
ODTLoff+1
Updating Settings
tMOD
New Settings
VALID
Rtt_Nom DISABLED prior and/or after MRS command
ODT
VALID
VALID
VALID
VALID
VALID
VALID
VALID
Figure 4 – tMOD Timing
VALID
VALID
VALID
TIME BREAK
VALID
DON'T CARE
The mode register contents can be changed using the same command and timing requirements
during normal operation as long as the DRAM is in idle state, i.e., all banks are in the precharged state
with tRP satisfied, all data bursts are completed and CKE is high prior to writing into the mode register.
If the Rtt_Nom Feature is enabled in the Mode Register prior and/or after a MRS command, the ODT
signal must continuously be registered LOW ensuring RTT is in an off state prior to the MRS
command. The ODT signal may be registered high after tMOD has expired. If the Rtt_Nom feature is
disabled in the Mode Register prior and after a MRS command, the ODT signal can be registered
either LOW or HIGH before, during and after the MRS command. The mode registers are divided into
various fields depending on the functionality and/or modes.
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Publication Release Date: Jan. 20, 2015
Revision: A05