W632GU8KB Datasheet, PDF (46/160 Pages) Winbond – 32M X 8 BANKS X 8 BIT DDR3L SDRAM

W632GU8KB
8.13.2.2 READ Timing; Data Strobe to Data relationship
The Data Strobe to Data relationship is shown in Figure 25 and is applied when the DLL is enabled
and locked.
Rising data strobe edge parameters:
 tDQSQ describes the latest valid transition of the associated DQ pins.
 tQH describes the earliest invalid transition of the associated DQ pins.
Falling data strobe edge parameters:
 tDQSQ describes the latest valid transition of the associated DQ pins.
 tQH describes the earliest invalid transition of the associated DQ pins.
tDQSQ; both rising/falling edges of DQS, no tAC defined.
T0
T1
CK#
CK
Command*³
READ
NOP
Address*⁴
Bank
Col n
DQS, DQS#
DQ*² (Last data valid)
DQ*² (first data no longer valid)
All DQs collectively
T2
T3
T4
NOP
NOP
RL = AL + CL
NOP
T5
T6
T7
T8
T9
T10
NOP
NOP
NOP
NOP
NOP
NOP
tDQSQ(max)
tDQSQ(max)
tRPST
tRPRE
tQH
Dout
n
Dout
n+1
tQH
Dout
n+2
Dout
n+3
Dout
n+4
Dout
n+5
Dout
n+6
Dout
n+7
Dout
n
Dout
n+1
Dout
n+2
Dout
n+3
Dout
n+4
Dout
n+5
Dout
n+6
Dout
n+7
Dout
n
Dout
n+1
Dout
n+2
Dout
n+3
Dout
n+4
Dout
n+5
Dout
n+6
Dout
n+7
TRANSITIONING DATA
DON'T CARE
Notes:
1. BL = 8, RL = 6 (AL = 0, CL = 6).
2. Dout n = data-out from column n.
3. NOP commands are shown for ease of illustration; other commands may be valid at these times.
4. BL8 setting activated by either MR0 A[1:0] = 00 or MR0 A[1:0] = 01 and A12 = 1 during READ command at T0.
5. Output timings are referenced to VDDQ/2, and DLL on for locking.
6. tDQSQ defines the skew between DQS, DQS# to Data and does not define DQS, DQS# to Clock.
7. Early Data transitions may not always happen at the same DQ. Data transitions of a DQ can vary (either early or late) within
a burst.
Figure 25 – Data Strobe to Data Relationship
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Publication Release Date: Jan. 20, 2015
Revision: A05