SPRUGZ8D Datasheet, PDF (2955/3016 Pages) Texas Instruments – Technical Reference Manual

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Registers
25.9.6.1.5 Interrupt Enable Register for INTRTX (INTRTXE)
The interrupt enable register for INTRTX (INTRTXE) is a 16-bit register that provides interrupt enable bits
for the interrupts in IntrTx. On reset, the bits corresponding to endpoint 0 and the TX endpoints are set to
1. This register is shown in Figure 25-152 and described in Table 25-166.
15
EP15TX
R-0-1h
Figure 25-152. Interrupt Enable Register for INTRTX (INTRTXE)
14
13
12
11
10
9
EP14TX
EP13TX
EP12TX
EP11TX
EP10TX
EP9TX
R-0-1h
R-0-1h
R-0-1h
R-0-1h
R-0-1h
R-0-1h
7
6
5
4
EP7TX
EP6TX
EP5TX
EP4TX
R-0-1h
R-0-1h
R-0-1h
R-0-1h
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
3
EP3TX
R-0-1h
2
EP2TX
R-0-1h
1
EP1TX
R-0-1h
8
EP8TX
R-0-1h
0
EP0
R-0-1h
Table 25-166. Interrupt Enable Register for INTRTX (INTRTXE) Field Descriptions
Bits Field Name
15 EP15TX
14 EP14TX
:
:
4
EP4TX
3
EP3TX
2
EP2TX
1
EP1TX
0
EP0
Description
Transmit endpoint 15 interrupt enable
Transmit endpoint 14 interrupt enable
:
Transmit endpoint 4 interrupt enable
Transmit endpoint 3 interrupt enable
Transmit endpoint 2 interrupt enable
Transmit endpoint 1 interrupt enable
Endpoint 0 interrupt active
SPRUGZ8D – 14 November 2011 – Revised April 2013
Universal Serial Bus Subsystem (USBSS)
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