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Device Interrupts and EDMA Events
Table 1-100. Media Controller INTC Interrupt Crossbar Mapping
Media_Controller_INTMUX_x Multiplexed Interrupt Name
Value
0
Default Interrupt (See Table 1-
99)
1
SATAINT
2
SDINT1
3
SDINT2
4
I2CINT2
5
I2CINT3
6
GPIO3INT0
7
GPIO3INT1
8
GFXINT
9
UARTINT0
10
UARTINT1
11
UARTINT2
12
FDIFINT1
13
PCIINT0
14
PCIINT1
15
PCIINT2
16
PCIINT3
17
DCAN0INT0
18
DCAN0INT1
19
DCAN0PARIT
20
DCAN1INT0
21
DCAN1INT1
22
DCAN1PARIT
23
MLBSYSINT0
24
MLBSYSINT1
25
MLBINT
26
RTCINT
27
RTCALARMINT
28
IDEINTR
29
MCATXINT2
30
MCARXINT2
31
MCBSPINT
32
GPMCINT
33
MCATXINT3
34
MCARXINT3
35
MCATXINT4
36
MCARXINT4
37
MCATXINT5
38
MCARXINT5
39
EDMA3TC0_ERRINT
40
EDMA3TC1_ERRINT
41
EDMA3TC2_ERRINT
42
EDMA3TC3_ERRINT
43
SPIINT1
Multiplexed Interrupt Source
Default
SATA
SD1/SDIO1
SD2/SDIO2
I2C2
I2C3
GPIO3
GPIO3
SGX530
UART0
UART1
UART2
FDIF
PCIe
PCIe
PCIe
PCIe
DCAN0
DCAN0
DCAN0
DCAN1
DCAN1
DCAN1
MLB
MLB
MLB
RTC
RTC
PATA
McASP2
McASP2
McBSP
GPMC
McASP3
McASP3
McASP4
McASP4
McASP5
McASP5
EDMA3TC0
EDMA3TC1
EDMA3TC2
EDMA3TC3
SPI1
Description
Default
SATA Interrupt
SDIO1 Interrupt
SDIO2 Interrupt
I2C2 Interrupt
I2C3 Interrupt
GPIO3 Interrupt 0
GPIO3 Interrupt 1
SGX530 Error in the IMG Bus
Interrupt
UART0 Interrupt
UART1 Interrupt
UART2 Interrupt
Face Detect Interrupt 1
PCIe (Legacy) Interrupt 0
PCIe (MSI) Interrupt 1
PCIe (Error) Interrupt 2
PCIe (Power Management)
Interrupt 3
DCAN0 Interrupt 0
DCAN0 Interrupt 1
DCAN0 Parity Interrupt
DCAN1 Interrupt 0
DCAN1 Interrupt 1
DCAN1 Parity Interrupt
MLB Sys Interrupt 0
MLB Sys Interrupt 1
MLB Interrupt
RTC Timer Interrupt
RTC Alarm Interrupt
PATA Interrupt
McASP2 Transmit Interrupt
McASP2 Receive Interrupt
McBSP Common (TX/RX)
Interrupt
GPMC Interrupt
McASP3 Transmit Interrupt
McASP3 Receive Interrupt
McASP4 Transmit Interrupt
McASP4 Receive Interrupt
McASP5 Transmit Interrupt
McASP5 Receive Interrupt
EDMA3TC0 Error Interrupt
EDMA3TC1 Error Interrupt
EDMA3TC2 Error Interrupt
EDMA3TC3 Error Interrupt
SPI1 Interrupt
SPRUGZ8D – 14 November 2011 – Revised April 2013
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