SPRUGZ8D Datasheet, PDF (2284/3016 Pages) Texas Instruments – Technical Reference Manual

Architecture
18.2.8.1.2 Data Buffer Status
The data buffer status is defined in the following interrupt status register and status register:
• Interrupt status registers (see Figure 18-56):
– MMCHS_STAT[29] BADA: Bad access to data space
– MMCHS_STAT[5] BRR: Buffer read ready
– MMCHS_STAT[4] BWR: Buffer write ready
• Status registers (see Figure 18-53):
– MMCHS_PSTATE[11] BRE: Buffer read enable
– MMCHS_PSTATE[10] BWE: Buffer write enable
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18.2.9 Transfer Process
The process of a transfer is dependent on the type of command. It can be with or without a response, with
or without data.
18.2.9.1 Different Types of Commands
Different types of commands are specific to MMC, SD, or SDIO cards. See the Multimedia Card System
Specification, the SD Memory Card Specifications, the SDIO Card Specification, Part E1, or the SD Card
Specification, Part A2, SD Host Controller Standard Specification for more details.
18.2.9.2 Different Types of Responses
Different types of responses are specific to MMC, SD, or SDIO cards. See the Multimedia Card System
Specification, the SD Memory Card Specifications, the SDIO Card Specification, Part E1, or the SD Card
Specification, Part A2, SD Host Controller Standard Specification for more details.
Table 18-7 shows how the MMC, SD, and SDIO responses are stored in the MMCHS_RSPxx registers.
Table 18-7. MMC, SD, SDIO Responses in the MMCHS_RSPn Registers
Kind of Response
R1, R1b (normal response), R3, R4, R5, R5b, R6, R7
R1b (Auto CMD12 response)
R2
Response Field
RESP[39:8] ⁽¹⁾
RESP[39:8] ⁽¹⁾
RESP[127:0] ⁽¹⁾
(1) _{RESP refers to the command response format described in the specifications mentioned above.}
Response Register
MMCHS_RSP10[31:0]
MMCHS_RSP76[31:0]
MMCHS_RSP76[31:0]
MMCHS_RSP54[31:0]
MMCHS_RSP32[31:0]
MMCHS_RSP10[31:0]
When the host controller modifies part of the MMCHS_RSPxx registers, it preserves the unmodified bits.
The host controller stores the Auto CMD12 response in the MMCHS_RSP76[31:0] register because the
Host Controller may have a multiple block data DAT line transfer executing concurrently with a command.
This allows the host controller to avoid overwriting the Auto CMD12 response with the command response
stored in MMCHS_RSP10 register and conversely.
2284
Multimedia Card (MMC)/Secure Digital (SD)/ Secure Digital I/O (SDIO) Card SPRUGZ8D – 14 November 2011 – Revised April 2013
Interface
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