SPRUGZ8D Datasheet, PDF (1043/3016 Pages) Texas Instruments – Technical Reference Manual

www.ti.com
Peripheral Booting
• ROM code configures the PCIe device ID as B801h.
• The BAR window sizes for inbound translation are configurable as per the tables below
• Only legacy interrupt A is enabled. MSI is disabled
• The device is configured in the D0 power state
• The link and device capability is configured for maximum flexibility
• The PCIe settings used by the ROM can be overridden after boot by the Root Complex
Figure 4-24. PCIe Peripheral Booting Procedure
Peripheral Booting
Initialize Peripheral
Start Link Training
No
Link Training
Successful?
Yes
Download
No
Complete Flag Set
at 0x4031B7FC?
Yes
Jump to 0x40300000
BAR0
4KB
BAR1
8MB
Table 4-33. PCIe 32 BAR Window Size Configuration
PCIe32
BAR2
BAR3
CS0BW
Size
CS0MUX[1:0]
Size
0
0
0
0
1
16MB
01
32MB
10
64MB
11
128MB
BAR4
CS0WAIT
Size
0
0
1
256MB
BAR0/1
Table 4-34. PCIe 64 BAR Window Size Configuration
BAR 2/3
CS0WAIT :CS0BW
PCIe64
Size
BAR 4/5
CS0MUX[1:0]
Size
SPRUGZ8D – 14 November 2011 – Revised April 2013
Submit Documentation Feedback
ROM Code Memory and Peripheral Booting1043
Copyright © 2011–2013, Texas Instruments Incorporated