SPRUGZ8D Datasheet, PDF (1783/3016 Pages) Texas Instruments – Technical Reference Manual

www.ti.com
13.1 Introduction
Introduction
13.1.1 Overview
The high-definition multimedia interface wrapper (HDMI_WP) module is used to encapsulate the HDMI,
providing compatibility and interface to the HDMI TXPHY module. The HDMI_WP module contains the
support logic for the HDMI IP, including the HDMI core (HDMI_CORE) and CEC core. The major
additional parts comprise a slave interface port for configuration and buffering for the audio data streams.
Figure 13-1 is an overview of the HDMI module.
Figure 13-1. HDMI Overview
PRCM
Reference
Clock
Functional
Clock
Interface
Clock
Reset
HDMI_ICLK
HDMI_RST
Sync Output VGSS
DISPLAY Sub System
HDMI
HDMI CORE
CEC
Syncs
CEC Interface
Hot Plug Detect
DDC Interface
hdmi_cec
hdmi_hpd
hdmi_scl
hdmi_sda
EDMA
INTR
Video Output VPSS[29:0]
DMA
Request
DSS_HDMI_DMA
DSS_HDMI_IRQ
PCLK
Audio
FIFO
HDMI VIDEO
Input[36:0]
TMDS
Encoder
TMDS DATA
30
Audio
Parallel Tclk
I/F
PCLK
TMDS Clk
HDMI TX
PHY
PCLK
hdmi_data0X
hdmi_data0Y
hdmi_data1X
hdmi_data1Y
hdmi_data2X
hdmi_data2Y
hdmi_clkX
hdmi_clkY
HDCP Key Storage
HDCP Key
Protection
Configuration
13.1.2 Main Features
The HDMI module provides the following main features:
• HDMI 1.3, HDCP 1.2, and DVI 1.0 compliant
• EIA/CEA-861-D video format support
• VESA Display Monitor Timing (DMT) video format support
• Support for deep-color mode:
– 10-bit/component color depth up to 1080p at 60 Hz
– 12-bit/component color depth up to 720p/1080i at 60 Hz
• Supports up to 165-MHz pixel clock (1920 × 1080p at 60 Hz)
• Video formats: 24-bit RGB
• Uncompressed multichannel (up to eight channels) audio (L-PCM) support
• Master inter-intergrated circuit (I2C) interface for display data channel (DDC) connection
SPRUGZ8D – 14 November 2011 – Revised April 2013
High-Definition Multimedia Interface (HDMI)
Submit Documentation Feedback
Copyright © 2011–2013, Texas Instruments Incorporated
1783