SPRUGZ8D Datasheet, PDF (2133/3016 Pages) Texas Instruments – Technical Reference Manual

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McASP Registers
16.3.35 Transmitter DMA Event Control Register (XEVTCTL)
The transmitter DMA event control register (XEVTCTL) contains a disable bit for the transmit DMA event.
The XEVTCTL is shown in Figure 16-71 and described in Table 16-44.
NOTE: Device-specific registers
Accessing REVTCTL not implemented on a specific device may cause improper device
operation.
Figure 16-71. Transmitter DMA Event Control Register (XEVTCTL)
31
16
Reserved
R-0
15
Reserved
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
1
0
XDATDMA
R/W-0
Table 16-44. Transmitter DMA Event Control Register (XEVTCTL) Field Descriptions
Bit Field
31-1 Reserved
0 XDATDMA
Value
0
0
1
Description
Reserved. The reserved bit location always returns the default value. A value written to this field has no
effect. If writing to this field, always write the default value for future device compatibility.
Transmit data DMA request enable bit. If writing to this bit, always write the default value of 0.
Transmit data DMA request is enabled.
Reserved
SPRUGZ8D – 14 November 2011 – Revised April 2013
Multichannel Audio Serial Port (McASP)
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