SPRUGZ8D Datasheet, PDF (2727/3016 Pages) Texas Instruments – Technical Reference Manual

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UART Registers
24.3.15 Modem Status Register (MSR)
The modem status register (MSR) provides information about the current state of the control lines from the
modem, data set, or peripheral device to the Local Host. It also indicates when a control input from the
modem changes state. The modem status register (MSR) is shown in Figure 24-42 and described in
Table 24-24.
Figure 24-42. Modem Status Register (MSR)
15
Reserved
R-0
7
6
5
4
NCD_STS
NRI_STS
NDSR_STS
NCTS_STS
R-unknown
R-unknown
R-unknown
R-unknown
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
3
DCD_STS
R-0
2
RI_STS
R-0
1
DSR_STS
R-0
8
0
CTS_STS
R-0
Bit
15-8
7
6
5
4
3
Field
Reserved
NCD_STS
NRI_STS
NDSR_STS
NCTS_STS
DCD_STS
2 RI_STS
1 DSR_STS
0 CTS_STS
Table 24-24. Modem Status Register (MSR) Field Descriptions
Value
0
0
1
0
1
0
1
0
1
Description
Reserved.
This bit is the complement of the DCD input. In loopback mode, it is equivalent to MCR[3].
This bit is the complement of the RI input. In loopback mode, it is equivalent to MCR[2].
This bit is the complement of the DSR input. In loopback mode, it is equivalent to MCR[0].
This bit is the complement of the CTS input. In loopback mode, it is equivalent to MCR[1].
No change.
Indicates that DCD input (or MCR[3] in loopback mode) has changed. Cleared on a read.
No change.
Indicates that RI input (or MCR[2] in loopback mode) changed state from low to high. Cleared on a
read.
No change.
Indicates that DSR input (or MCR[0] in loopback mode) changed state. Cleared on a read.
No change.
Indicates that CTS input (or MCR[1] in loopback mode) changed state. Cleared on a read.
SPRUGZ8D – 14 November 2011 – Revised April 2013
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UART/IrDA/CIR Module 2727