SPRUGZ8D Datasheet, PDF (2323/3016 Pages) Texas Instruments – Technical Reference Manual

www.ti.com
MMC/SD/SDIO Registers
18.4.14 Command Response[31:0] Register (MMCHS_RSP10)
This 32-bit register holds bits positions [31:0] of command response type R1, R1b, R2, R3, R4, R5, R5b,
or R6. The command response[31:0] register (MMCHS_RSP10) is shown in Figure 18-48 and described
in Table 18-27.
Figure 18-48. Command Response[31:0] Register (MMCHS_RSP10)
31
16
15
0
RSP1
RSP0
R-0
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 18-27. Command Response[31:0] Register (MMCHS_RSP10) Field Descriptions
Bit
31-16
15-0
Field
RSP1
RSP0
Value Description
0-FFFFh Command Response [31:16]
0-FFFFh Command Response [15:0]
18.4.15 Command Response[63:32] Register (MMCHS_RSP32)
This 32-bit register holds bits positions [63:32] of command response type R2. The command
response[63:32] register (MMCHS_RSP32) is shown in Figure 18-49 and described in Figure 18-49.
Figure 18-49. Command Response[63:32] Register (MMCHS_RSP32)
31
16
15
0
RSP3
RSP2
R-0
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 18-28. Command Response[63:32] Register (MMCHS_RSP32) Field Descriptions
Bit
31-16
15-0
Field
RSP3
RSP2
Value Description
0-FFFFh Command Response [63:48]
0-FFFFh Command Response [47:32]
SPRUGZ8D – 14 November 2011 – Revised April 2013 Multimedia Card (MMC)/Secure Digital (SD)/ Secure Digital I/O (SDIO) Card
Submit Documentation Feedback
Interface
Copyright © 2011–2013, Texas Instruments Incorporated
2323