SPRUGZ8D Datasheet, PDF (1044/3016 Pages) Texas Instruments – Technical Reference Manual

Peripheral Booting
4KB
Table 4-34. PCIe 64 BAR Window Size Configuration (continued)
PCIe64
0
0
00
01
256MB
01
10
523MB
10
11
1GB
11
www.ti.com
0
1GB
2GB
4GB
Table 4-35. PCIe BAR Window Base Address and Offset Configuration
BAR
0
1 (64bit BAR0)
2
3 (64 Bit BAR2)
4
Base Address
0000 0000h
4000 0000h
6000 0000h
8000 0000h
A000 0000h
Offset
0000 0000h
4030 0000h
5000 0000h
8000 0000h
C000 0000h
Comments
OCMC RAM
GPMC
DDR 0
DDR 1
Note that the base address and offset configurations can be changed from the host after the enumeration
is complete.
4.8.6 UART Boot Procedure
4.8.6.1 Device Initialization
• UART boot uses UART0
• UART0 is configured to run at 115200 baud, 8-bits, even parity, 1 stop bit and no flow control.
4.8.6.2 Boot Image Download
• UART boot uses x-modem client protocol to receive the boot image.
• Utilities like hyperterm, teraterm, minicom can be used on the PC side to download the boot image to
the board
• With x-modem packet size of 1K throughout is roughly about 4KBytes/Sec.
• The ROM code will ping the host 10 times in 3s to start x-modem transfer. If host does not respond,
UART boot will timeout.
• Once the transfer has started, if the host does not send any packet for 3s, UART boot will time out.
• If the delay between two consecutive bytes of the same packet is more than 2ms, the host is
requested to re-transmit the entire packet again.
• Error checking using the CRC-16 support in x-modem. If an error is detected, the host is requested to
re-transmit the packet again.
1044
ROM Code Memory and Peripheral Booting
SPRUGZ8D – 14 November 2011 – Revised April 2013
Copyright © 2011–2013, Texas Instruments Incorporated
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