TLK105 Datasheet, PDF (92/99 Pages) Texas Instruments – Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer Transceiver

TLK105
TLK106
SLLSEB8A – AUGUST 2012 – REVISED MARCH 2013
9.6.25 Isolation Timing
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Table 9-25. Isolation Timing
PARAMETER
TEST CONDITIONS MIN TYP MAX UNIT
t₁
From Deassertion of S/W or H/W Reset to transition from Isolate to Normal
mode
71
ns
H/W or S/W Reset
MODE
t₁
ISOLATE
NORMAL
Figure 9-25. Isolation Timing
T0365-01
9.6.26 25MHz_OUT Clock Timing
Table 9-26. 25MHz_OUT Clock Timing
PARAMETER
t₁
25MHz_OUT⁽¹⁾ propagation delay
t₂
25MHz_OUT⁽¹⁾ High Time
t₃
25MHz_OUT⁽¹⁾ Low Time
TEST CONDITIONS
Relative to XI
MII mode
RMII mode
MII mode
RMII mode
(1) 25MHz_OUT characteristics are dependent upon the XI input characteristics.
MIN TYP MAX UNIT
8 ns
20
10
ns
20
10
XI
t₂
t₁
t₃
25MHz_OUT
Figure 9-26. 25MHz_OUT Timing
T0366-01
92
Electrical Specifications
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