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| TLK105 Datasheet, PDF (90/99 Pages) Texas Instruments – Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer Transceiver | |||
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TLK105
TLK106
SLLSEB8A â AUGUST 2012 â REVISED MARCH 2013
9.6.22 10Mbs Internal Loopback Timing
Table 9-22. 10Mbs Internal Loopback Timing
PARAMETER
t1
TX_EN to RX_DV Loopback
TEST CONDITIONS
10Mbs internal loopback mode
TX_CLK
www.ti.com
MIN TYP MAX UNIT
1.7
μs
TX_EN
TXD[3:0]
CRS
t1
RX_CLK
RX_DV
RXD[3:0]
(1) Measurement is made from the first rising edge of TX_CLK after assertion of TX_EN.
(2) Analog loopback was used. Looping the TX to RX at the analog input/output stage.
T0362-01
Figure 9-22. 10Mbs Internal Loopback Timing
9.6.23 RMII Transmit Timing
Table 9-23. RMII Transmit Timing
PARAMETER
t1
XI Clock Period
t2
TXD[1:0] and TX_EN data setup to X1 rising
t3
TXD[1:0] and TX_EN data hold to X1 rising
t4
XI Clock to PMD Output Pair Latency
TEST CONDITIONS
50MHz Reference
Clock
MIN TYP MAX UNIT
20
1.4
ns
2.0
12
bits
XI
TXD[1:0]
TX_EN
PMD Output Pair
t1
t2
t3
Valid Data
t4
Symbol
90
Electrical Specifications
Figure 9-23. RMII Transmit Timing
Copyright © 2012â2013, Texas Instruments Incorporated
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