TLK105 Datasheet, PDF (36/99 Pages) Texas Instruments – Industrial Temp, Single Port 10/100Mbs Ethernet Physical Layer Transceiver

TLK105
TLK106
SLLSEB8A – AUGUST 2012 – REVISED MARCH 2013
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7.2.2 Crystal
The use of a 25MHz, parallel, 20pF-load crystal is recommended if a crystal source is desired. Figure 7-2
shows a typical connection for a crystal resonator circuit. The load capacitor values will vary with the
crystal vendors; check with the vendor for the recommended loads.
The oscillator circuit is designed to drive a parallel-resonance AT-cut crystal with a minimum drive level of
100μW and a maximum of 500μW. If a crystal is specified for a lower drive level, a current limiting resistor
must be placed in series between XO and the crystal.
As a starting point for evaluating an oscillator circuit, if the requirements for the crystal are not known, set
the values for C_L1 and C_L2 at 33pF, and R₁ should be set at 0Ω. Specifications for a 25MHz crystal are
listed in Table 7-3.
PARAMETER
Frequency
Frequency Tolerance
Frequency Stability
Rise / Fall Time
Jitter (Short term)
Jitter (Long term)
Symmetry
Load Capacitance
PARAMETER
Frequency
Frequency Tolerance
Frequency Stability
Rise / Fall Time
Jitter (Short term)
Jitter (Long term)
Symmetry
PARAMETER
Frequency
Frequency Tolerance
Frequency Stability
Load Capacitance
36
Design Guidelines
XI
XO
R₁
C_L1
C_L2
S0340-01
Figure 7-2. Crystal Oscillator Circuit
Table 7-1. 25MHz Oscillator Specification
TEST CONDITIONS
Operational Temperature
1 year aging
10%–90%
Cycle-to-cycle
Accumulative over 10 ms
Duty Cycle
MIN
40%
TYP MAX UNIT
25
MHz
±50 ppm
±50 ppm
8 nsec
50
psec
1 nsec
60%
15
30 pF
Table 7-2. 50MHz Oscillator Specification
TEST CONDITIONS
Operational Temperature
1 year aging
10%–90%
Cycle-to-cycle
Accumulative over 10 ms
Duty Cycle
MIN
40%
TYP MAX UNIT
50
MHz
±50 ppm
±50 ppm
6 nsec
50
psec
1 nsec
60%
Table 7-3. 25MHz Crystal Specification
TEST CONDITIONS
Operational Temperature
At 25°C
1 year aging
MIN TYP MAX UNIT
25
MHz
±50 ppm
±50 ppm
±5 ppm
10
40 pF
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